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Commit Graph

106106 Commits

Author SHA1 Message Date
Juergen Ributzka
f6e1a34d78 [FastISel][AArch64 and X86] Don't emit stores for UNDEF arguments during function call lowering.
UNDEF arguments are not ment to be touched - especially for the webkit_js
calling convention. This fix reproduces the already existing behavior of
SelectionDAG in FastISel.

llvm-svn: 214366
2014-07-31 00:11:11 +00:00
Duncan P. N. Exon Smith
f58c944271 verify-uselistorder: Add RUN lines to cases in test/Assembly
Add RUN line for `verify-uselistorder` to every test in `test/Assembly`,
unless it's a negative check (assembler rejects it) or verification
fails.

There are three files that verification fails on (so I've left out the
RUN lines):

  - 2002-08-22-DominanceProblem.ll
  - ConstantExprFold.ll
  - ConstantExprFoldCast.ll

This is part of PR5680.

llvm-svn: 214365
2014-07-31 00:10:27 +00:00
Reid Kleckner
af14072547 X86 asm parser: Avoid duplicating the list of aliased instructions
No functional change.

llvm-svn: 214364
2014-07-31 00:07:33 +00:00
Joerg Sonnenberger
a5a8f9d13c Add mtpid/mfpid for BookE.
llvm-svn: 214363
2014-07-30 23:59:11 +00:00
Rafael Espindola
90f7ab6be3 Attempt at fixing the windows dll build.
It looks like only direct (i.e., explicitly listed) dependencies are
scanned.

llvm-svn: 214361
2014-07-30 23:39:30 +00:00
Justin Bogner
6e20cf2ba5 llvm-profdata: Add a test for mismatched numbers of counters
llvm-svn: 214360
2014-07-30 23:36:06 +00:00
Justin Bogner
c9c7d98c23 llvm-profdata: Use consistent file suffixes in tests
In some places we've been using different suffixes for the different
file formats involved in instrprof, but in others we've just
ambiguously used .profdata. Update the test files to indicate the
types of file more obviously.

No functional change.

llvm-svn: 214357
2014-07-30 23:02:01 +00:00
Rafael Espindola
9f2d511fe1 Use "weak alias" instead of "alias weak"
Before this patch we had

@a = weak global ...
but
@b = alias weak ...

The patch changes aliases to look more like global variables.

Looking at some really old code suggests that the reason was that the old
bison based parser had a reduction for alias linkages and another one for
global variable linkages. Putting the alias first avoided the reduce/reduce
conflict.

The days of the old .ll parser are long gone. The new one parses just "linkage"
and a later check is responsible for deciding if a linkage is valid in a
given context.

llvm-svn: 214355
2014-07-30 22:51:54 +00:00
Joerg Sonnenberger
3845a9a9b8 Refactor TLBIVAX and add tlbsx.
llvm-svn: 214354
2014-07-30 22:51:15 +00:00
Reid Kleckner
e44e98bb37 X86 asm parser: Use a loop to disambiguate suffixes instead of copy paste
This works towards making the Intel syntax asm matcher use a completely
different disambiguation strategy.

No functional change.

llvm-svn: 214352
2014-07-30 22:23:11 +00:00
Juergen Ributzka
d1fc9d2924 [FastISel][AArch64] Add select folding support for the XALU intrinsics.
This improves the code generation for the XALU intrinsics when the
condition is feeding a select instruction.

This also updates and enables the XALU unit tests for FastISel.

This fixes <rdar://problem/17831117>.

llvm-svn: 214350
2014-07-30 22:04:37 +00:00
Juergen Ributzka
6162229025 [FastISel][AArch64] Add branch folding support for the XALU intrinsics.
This improves the code generation for the XALU intrinsics when the
condition is feeding a branch instruction.

This is related to <rdar://problem/17831117>.

llvm-svn: 214349
2014-07-30 22:04:34 +00:00
Juergen Ributzka
b93a2a4457 [FastISel][AArch64] Add {s|u}{add|sub|mul}.with.overflow intrinsic support.
This commit adds support for the {s|u}{add|sub|mul}.with.overflow intrinsics.
The unit tests for FastISel will be enabled in a later commit, once there is
also branch and select folding support.

This is related to <rdar://problem/17831117>.

llvm-svn: 214348
2014-07-30 22:04:31 +00:00
Juergen Ributzka
30bf8840d7 [FastISel] Move the helper function isCommutativeIntrinsic into FastISel base class.
Move the helper function isCommutativeIntrinsic into the FastISel base class,
so it can be used by more than just one backend.

llvm-svn: 214347
2014-07-30 22:04:28 +00:00
Juergen Ributzka
f12a2ac4ea [FastISel][AArch64] Create helper functions to create the various multiplies on AArch64.
llvm-svn: 214346
2014-07-30 22:04:25 +00:00
Juergen Ributzka
9ceeaa8bbc [FastISel][AArch64] Add support for shift-immediate.
Currently the shift-immediate versions are not supported by tblgen and
hopefully this can be later removed, once the required support has been
added to tblgen.

llvm-svn: 214345
2014-07-30 22:04:22 +00:00
David Majnemer
994e0d02b9 InstCombine: Simplify (A ^ B) or/and (A ^ B ^ C)
While we can already transform A | (A ^ B) into A | B, things get bad
once we have (A ^ B) | (A ^ B ^ Cst) because reassociation will morph
this into (A ^ B) | ((A ^ Cst) ^ B).  Our existing patterns fail once
this happens.

To fix this, we add a new pattern which looks through the tree of xor
binary operators to see that, in fact, there exists a redundant xor
operation.

What follows bellow is a correctness proof of the transform using CVC3.

$ cat t.cvc
A, B, C : BITVECTOR(64);

QUERY BVXOR(A, B) | BVXOR(BVXOR(B, C), A) = BVXOR(A, B) | C;
QUERY BVXOR(BVXOR(A, C), B) | BVXOR(A, B) = BVXOR(A, B) | C;

QUERY BVXOR(A, B) & BVXOR(BVXOR(B, C), A) = BVXOR(A, B) & ~C;
QUERY BVXOR(BVXOR(A, C), B) & BVXOR(A, B) = BVXOR(A, B) & ~C;

$ cvc3 < t.cvc
Valid.
Valid.
Valid.
Valid.

llvm-svn: 214342
2014-07-30 21:26:37 +00:00
Joerg Sonnenberger
acae7c8f64 Add rfdi and rfmci from the e500/e500mc ISA.
llvm-svn: 214339
2014-07-30 21:09:03 +00:00
Chad Rosier
9d0d33e341 SLP Vectorizer: Canonicalize tree operands of commutitive binary operands.
llvm-svn: 214338
2014-07-30 21:07:56 +00:00
Rafael Espindola
d0d1fa9454 SimplifyCFG: Avoid miscompilations due to removed lifetime intrinsics.
The lifetime intrinsics need some work in order to make it clear which
optimizations are or are not valid.

For now dropping this optimization avoids a miscompilation.

Patch by Björn Steinbrink.

llvm-svn: 214336
2014-07-30 21:04:00 +00:00
Joerg Sonnenberger
e81540b210 Add BookE's tlbre, tlbwe and tlbivax instructions.
llvm-svn: 214332
2014-07-30 20:44:04 +00:00
Alex Lorenz
7adaa39434 docs: update the command guide documentation for llvm-profdata.
Differential Revision: http://reviews.llvm.org/D4726

llvm-svn: 214331
2014-07-30 20:30:11 +00:00
Louis Gerbarg
005b59a008 Fix test case introduced in r214322
This patch adds an explicit triple to the test case introduced by r214322. This
should fix build failueres that are occuring on bots that are cross building.

llvm-svn: 214330
2014-07-30 20:26:09 +00:00
Hans Wennborg
bc85414806 LangRef: add a note about the mangling-suppressing \01 prefix
Someone asked about this on IRC the other day, and I couldn't
find the magic prefix documented anywhere.

Differential Revision: http://reviews.llvm.org/D4728

llvm-svn: 214329
2014-07-30 20:02:08 +00:00
Rafael Espindola
f375e42f72 Refactor duplicated code.
llvm-svn: 214328
2014-07-30 19:42:16 +00:00
Aaron Ballman
0373fb9233 Fixing a few -Woverloaded-virtual warnings by exposing the hidden virtual function as well. No functional changes intended.
llvm-svn: 214325
2014-07-30 19:23:59 +00:00
Louis Gerbarg
909cb65fe7 Retain alignment requirements for load->selects modified by DAGCombine
DAGCombine may choose to rewrite graphs where two loads feed a select into
graphs where a select of two addresses feed a load. While it sanity checks the
loads to make sure they are broadly equivalent it currently just uses the
alignment restriction of the left node. In cases where the right node has
stronger alignment requiresment this may lead to bad codegen, such as generating
an aligned load where an unaligned load is required. This patch makes the
combine generate a load with an alignment that is the same as whichever is more
restrictive of the two alignments.

Tests included.

rdar://17762530

llvm-svn: 214322
2014-07-30 18:24:41 +00:00
Duncan P. N. Exon Smith
789d5bf211 UseListOrder: Visit global values
When predicting use-list order, we visit functions in reverse order
followed by `GlobalValue`s and write out use-lists at the first
opportunity.  In the reader, this will translate to *after* the last use
has been added.

For this to work, we actually need to descend into `GlobalValue`s.
Added a targeted test in `use-list-order.ll` and `RUN` lines to the
newly passing tests in `test/Bitcode`.

There are two remaining failures in `test/Bitcode`:

  - blockaddress.ll: I haven't thought through how to model the way
    block addresses change the order of use-lists (or how to work around
    it).

  - metadata-2.ll: There's an old-style `@llvm.used` global array here
    that I suspect the .ll parser isn't upgrading properly.  When it
    round-trips through bitcode, the .bc reader *does* upgrade it, so
    the extra variable (`i8* null`) has an extra use, and the shuffle
    vector doesn't match.

    I think the fix is to upgrade old-style global arrays (or reject
    them?) in the .ll parser.

This is part of PR5680.

llvm-svn: 214321
2014-07-30 17:51:09 +00:00
Duncan P. N. Exon Smith
26315bc9ac Fix line endings before adding RUN lines, NFC
llvm-svn: 214320
2014-07-30 17:49:00 +00:00
Duncan P. N. Exon Smith
4af7ebf31b Rename llvm-uselistorder => verify-uselistorder
llvm-svn: 214318
2014-07-30 17:11:27 +00:00
Duncan P. N. Exon Smith
b6bcf3312a llvm-uselistorder: Improve the tool description
llvm-svn: 214317
2014-07-30 16:59:19 +00:00
Duncan P. N. Exon Smith
a5a28761a7 llvm-uselistorder: Fix memory leak from r214125
Turns out `parseBitcodeFile()` does *not* take ownership of the buffer.
This was already clear in the header docs, but I obviously didn't read
them (having noticed that it gets stored in a `unique_ptr<>`).

llvm-svn: 214313
2014-07-30 16:50:22 +00:00
Rafael Espindola
efac481bb2 Add the missing hasLinkOnceODRLinkage predicate.
llvm-svn: 214312
2014-07-30 15:57:51 +00:00
Rafael Espindola
baab42a761 Add a small test showing when a linkonce_odr symbol can be hidden.
llvm-svn: 214311
2014-07-30 15:31:21 +00:00
Manuel Jacob
e21aa5698e Correct vector type definition in LangRef.
According to VectorType::isValidElementType, any integer, floating point
or pointer type is a valid vector element type.

llvm-svn: 214302
2014-07-30 12:30:06 +00:00
Joerg Sonnenberger
270c5a66fb Add BookE's wrtee and wrteei instructions.
llvm-svn: 214297
2014-07-30 10:32:51 +00:00
Joerg Sonnenberger
577206124d SPRG 0 to 3 are valid outside BookE, so move them to the normal test
file. Add support for accessing SPRG 4 to 7 on BookE.

llvm-svn: 214295
2014-07-30 09:24:37 +00:00
Chandler Carruth
c9d7906c01 Don't manually (and forcibly) run the verifier on the entire module from
the jump instruction table pass. First, the verifier is already built
into all the tools. The test case is adapted to just run llvm-as
demonstrating that we still catch the broken module. Second, the
verifier is *extremely* slow. This was responsible for very significant
compile time regressions.

If you have deployed a Clang binary anywhere from r210280 to this
commit, you really want to re-deploy.

llvm-svn: 214287
2014-07-30 05:44:04 +00:00
Lang Hames
926cf02e43 [MCJIT] Fix the ARM BR24 relocation in RuntimeDyldMachO.
We now (1) correctly decode the branch immediate, (2) modify the immediate to
corretly treat it as PC-rel, and (3) properly populate the stub entry.
Previously we had been doing each of these wrong.

<rdar://problem/17750739>

llvm-svn: 214285
2014-07-30 03:35:05 +00:00
Hal Finkel
b7aa9aa0dd [PowerPC] Add JMP_SLOT relocation definitions
This will be required by upcoming patches for LLDB support.

Patch by Justin Hibbits!

llvm-svn: 214284
2014-07-30 03:20:45 +00:00
Matt Arsenault
a82949eb53 R600/SI: Remove redundant setting of bits on instructions.
neverHasSideEffects is deprecated, and hasSideEffects = 0 is already
set on the base classes of the basic ALU instruction classes. The
base classes also already set mayLoad = 0 and mayStore = 0

llvm-svn: 214283
2014-07-30 03:18:57 +00:00
Lang Hames
e0efab6e8e [MCJIT] Actually remap sections based llvm-rtdyld options added in r214255.
This line was accidentally left out of that patch.

llvm-svn: 214282
2014-07-30 03:12:41 +00:00
Rafael Espindola
d95a431fd9 Use range loops.
llvm-svn: 214280
2014-07-30 01:52:40 +00:00
Rafael Espindola
9f7e19243c Convert a few more function pointer calls to just "f()".
llvm-svn: 214276
2014-07-30 01:36:32 +00:00
Adam Nemet
53ebec6583 [AVX512] Test that _mm512_set1_* intrinsics generate broadcasts
llvm-svn: 214275
2014-07-30 01:30:51 +00:00
Adam Nemet
29f192c73f [AVX512] Add missing CHECK-LABEL
llvm-svn: 214273
2014-07-30 01:30:45 +00:00
Rafael Espindola
d5c0acb861 Don't duplicate the function name in a comment.
llvm-svn: 214272
2014-07-30 01:23:45 +00:00
Duncan P. N. Exon Smith
1d7b0f97dd Reapply "UseListOrder: Order GlobalValue uses after initializers"
This reverts commit r214249, reapplying r214242 and r214243, now that
r214270 has fixed the UB.

llvm-svn: 214271
2014-07-30 01:22:16 +00:00
Duncan P. N. Exon Smith
5d1b1e64b5 UseListOrder: Fix undefined behaviour
This commit fixes undefined behaviour that caused the revert in r214249.

The problem was two unsequenced operations on a `DenseMap<>`, giving
different behaviour in GCC and Clang.  This:

    DenseMap<T*, unsigned> DM;
    for (auto &X : ...)
      DM[&X] = DM.size() + 1;

should have been:

    DenseMap<T*, unsigned> DM;
    for (auto &X : ...) {
      unsigned Size = DM.size();
      DM[&X] = Size + 1;
    }

Until r214242, this difference between compilers didn't matter.  In
r214242, `OrderMap::LastGlobalValueID` was introduced and compared
against IDs, which in GCC were off-by-one my expectations.

llvm-svn: 214270
2014-07-30 01:20:26 +00:00
Matt Arsenault
d8f2b465a3 R600/SI: Consider adjacent offsets in getLdStBaseRegImmOfs
We can treat ds_read2_* as a single offset if the offsets are adjacent.

No test since emission of read2 instructions for partially
aligned loads isn't implemented yet.

llvm-svn: 214269
2014-07-30 01:01:10 +00:00