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3104 Commits

Author SHA1 Message Date
Evan Cheng
7dab9abfb8 Add methods to add implicit def use operands to a MI. 
llvm-svn: 31675
 2006-11-11 10:20:02 +00:00
Chris Lattner
edfc824673 disallow preinc of a frameindex. This is not profitable and causes 2-addr 
pass to explode.  This fixes a bunch of llc-beta failures on ppc last night.

llvm-svn: 31661
 2006-11-11 01:00:15 +00:00
Chris Lattner
bf0c3e3a02 reduce indentation by using early exits. No functionality change. 
llvm-svn: 31660
 2006-11-11 00:56:29 +00:00
Chris Lattner
671ea7a93b move big chunks of code out-of-line, no functionality change. 
llvm-svn: 31658
 2006-11-11 00:39:41 +00:00
Chris Lattner
1f61c6c84d Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast

llvm-svn: 31644
 2006-11-10 21:37:15 +00:00
Evan Cheng
013597778d Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Evan Cheng
78ba99caa5 When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
llvm-svn: 31631
 2006-11-10 08:28:11 +00:00
Chris Lattner
efb62464b9 commentate 
llvm-svn: 31627
 2006-11-10 04:41:34 +00:00
Evan Cheng
17dd6dd46c Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
llvm-svn: 31598
 2006-11-09 19:10:46 +00:00
Evan Cheng
c050bb298f Add a mechanism to specify whether a target supports a particular indexed load / store. 
llvm-svn: 31597
 2006-11-09 18:56:43 +00:00
Evan Cheng
22bb3ba200 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31596
 2006-11-09 18:44:21 +00:00
Evan Cheng
89ee587963 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31595
 2006-11-09 17:55:04 +00:00
Jim Laskey
8a5a95d868 Allows debugging llc self hosted. 
llvm-svn: 31594
 2006-11-09 16:32:26 +00:00
Jim Laskey
19fb42c34d Merging dwarf info to a single compile unit. 
llvm-svn: 31593
 2006-11-09 14:52:14 +00:00
Evan Cheng
6b7d127df9 getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
llvm-svn: 31584
 2006-11-09 04:29:46 +00:00
Evan Cheng
8743c67826 Remove M_2_ADDR_FLAG. 
llvm-svn: 31583
 2006-11-09 02:22:54 +00:00
Evan Cheng
fcef896f6e Match more post-indexed ops. 
llvm-svn: 31569
 2006-11-08 20:27:27 +00:00
Jim Laskey
28fec74f1b Remove redundant <cmath>. 
llvm-svn: 31561
 2006-11-08 19:16:44 +00:00
Jim Laskey
4d636f03f7 Now can re-enable debug label folding. 
llvm-svn: 31549
 2006-11-08 14:17:45 +00:00
Evan Cheng
1f5c4a6c43 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.

llvm-svn: 31544
 2006-11-08 08:30:28 +00:00
Evan Cheng
acc6a98286 Fixed a minor bug preventing some pre-indexed load / store transformation. 
llvm-svn: 31543
 2006-11-08 06:56:05 +00:00
Reid Spencer
da1f5b882a For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542
 2006-11-08 06:47:33 +00:00
Evan Cheng
e50f5e4c05 Fix a obscure post-indexed load / store dag combine bug. 
llvm-svn: 31537
 2006-11-08 02:38:55 +00:00
Chris Lattner
f71921c79d optimize single MBB loops better. In particular, produce: 
LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        jne LBB1_57     #bb207.i
        jmp LBB1_64     #cond_next255.i

intead of:

LBB1_57:        #bb207.i
        movl 72(%esp), %ecx
        movb (%ecx,%eax), %cl
        movl 80(%esp), %edx
        movb %cl, 1(%edx,%eax)
        incl %eax
        cmpl $143, %eax
        je LBB1_64      #cond_next255.i
        jmp LBB1_57     #bb207.i

This eliminates a branch per iteration of the loop.  This hurted PPC
particularly, because the extra branch meant another dispatch group for each
iteration of the loop.

llvm-svn: 31530
 2006-11-08 01:03:21 +00:00
Jim Laskey
f0843a78c4 Accidently reran commit. 
llvm-svn: 31516
 2006-11-07 21:58:55 +00:00
Jim Laskey
5264310433 Missed a label map, reverting till covered. 
llvm-svn: 31514
 2006-11-07 21:37:31 +00:00
Jim Laskey
54a8f6f998 Missed a label map, reverting till covered. 
llvm-svn: 31512
 2006-11-07 20:53:05 +00:00
Jim Laskey
7e0f0b2d24 1. Add a pass to fold debug label instructions so a debug info client can detect 
empty ranges.

2. Reorg how MachineDebugInfo maintains changes to debug labels.

3. Have dwarf writer use debug label info to simplify scopes and source line
coorespondence.

4. Revert the merging of compile units until I can get the bugs ironed out.

llvm-svn: 31507
 2006-11-07 19:33:46 +00:00
Chris Lattner
3e2e03ef34 Enable improved spilling costs by default. This speeds up viterbi on x86 
by 40%, FreeBench/fourinarow by 20%, and many other programs 10-25%.

On PPC, this speeds up fourinarow by 18%, and probably other things as well.

llvm-svn: 31504
 2006-11-07 18:04:58 +00:00
Jim Laskey
4b1aff4aec Use correct value for float HUGH_VAL. 
llvm-svn: 31500
 2006-11-07 12:25:45 +00:00
Evan Cheng
3db2b3aab9 Add post-indexed load / store transformations. 
llvm-svn: 31498
 2006-11-07 09:03:05 +00:00
Chris Lattner
f966846d10 Add a new llcbeta option. This speeds up viterbi from 12.34 to 8.76s on 
X86.  If happy, I'll enable this by default.

llvm-svn: 31493
 2006-11-07 07:18:40 +00:00
Reid Spencer
03e18e905e Unbreak X86/ELF Debugging. Somehow this line got lost in Jim's cleanup. 
llvm-svn: 31492
 2006-11-07 06:36:36 +00:00
Chris Lattner
c8d5fc4461 Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll. 
The low part goes in the first operand of expandop, not the second one.

llvm-svn: 31487
 2006-11-07 04:11:44 +00:00
Evan Cheng
ef1c22b6fa Remove dead code; added a missing null ptr check. 
llvm-svn: 31478
 2006-11-06 21:33:46 +00:00
Jim Laskey
1f3ff6bcfe Tab interferes with uniqueness. 
NOTE: There doesn't seem to be consistency for whether a leading tab
is present in a section heading.

llvm-svn: 31475
 2006-11-06 16:23:59 +00:00
Jim Laskey
2008b25d7e D'oh - reversed logic. 
llvm-svn: 31474
 2006-11-06 13:20:29 +00:00
Evan Cheng
f191d53a9a Add comment. 
llvm-svn: 31473
 2006-11-06 08:14:30 +00:00
Jeff Cohen
e1003da1a2 Unbreak VC++ build. 
llvm-svn: 31464
 2006-11-05 19:31:28 +00:00
Evan Cheng
bf7db95159 Added pre-indexed store support. 
llvm-svn: 31459
 2006-11-05 09:31:14 +00:00
Evan Cheng
ae357e5044 Added getIndexedStore. 
llvm-svn: 31458
 2006-11-05 09:30:09 +00:00
Jim Laskey
1c8b925a87 Live local variables are being dropped because the begin or end labels marking 
their scope are being deleted.  Workaround is to widen scope to full function.

llvm-svn: 31454
 2006-11-04 10:48:07 +00:00
Evan Cheng
42cb1fd0ac Changes to use operand constraints to process two-address instructions. 
llvm-svn: 31453
 2006-11-04 09:44:31 +00:00
Evan Cheng
4328919c08 Fixed some spiller bugs exposed by the recent two-address code changes. Now 
there may be other def(s) apart from the use&def two-address operand. We need
to check if the register reuse for a use&def operand may conflicts with another
def. Provide a mean to recover from the conflict if it is detected when the
defs are processed later.

llvm-svn: 31439
 2006-11-04 00:21:55 +00:00
Chris Lattner
7628decccf this will work better 
llvm-svn: 31419
 2006-11-03 19:15:55 +00:00
Chris Lattner
8bf77463ea Fix the build on xcode < 2.4 
llvm-svn: 31417
 2006-11-03 19:13:59 +00:00
Evan Cheng
047a33d3e3 Fix comments. 
llvm-svn: 31414
 2006-11-03 07:31:32 +00:00
Evan Cheng
466e20fca2 Rename 
llvm-svn: 31413
 2006-11-03 07:21:16 +00:00
Reid Spencer
8cac48e619 Remove dead variable. Fix 80 column violations. 
llvm-svn: 31412
 2006-11-03 03:30:34 +00:00
Evan Cheng
a0133317f7 Added DAG combiner transformation to generate pre-indexed loads. 
llvm-svn: 31410
 2006-11-03 03:06:21 +00:00
Evan Cheng
b9ed18642c Added isPredecessor. 
llvm-svn: 31409
 2006-11-03 03:05:24 +00:00
Evan Cheng
79570c731a Proper check for two-addressness. 
llvm-svn: 31408
 2006-11-03 03:04:46 +00:00
Chris Lattner
d4881b4e2d silence warning 
llvm-svn: 31397
 2006-11-03 01:28:29 +00:00
Reid Spencer
0f30aec7d3 Make CodeGen libs -pedantic clean. 
llvm-svn: 31387
 2006-11-02 23:56:21 +00:00
Jim Laskey
599ad8b222 1. Hash not quite right for DIEValues. 
2. Not going to use Usage (no significant benefit.)

llvm-svn: 31384
 2006-11-02 21:48:18 +00:00
Reid Spencer
8f92705113 Remove unused variable. 
llvm-svn: 31382
 2006-11-02 20:55:40 +00:00
Reid Spencer
4bafa71dc1 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
 2006-11-02 20:25:50 +00:00
Jim Laskey
14437996b7 General clean up of teh dwarf writer. 
1. Most significant is the folding of debug information entries.  This
reduced self hosted -g SelectionDAGISel.s from 120M to 13M and pretty
close to matching .o file sizes with gcc.

2. Debug information entry printing for debugging the dwarf code.

3. Bring all the code closer to llvm standards.

4. Misc. fixes and doc clean ups.

llvm-svn: 31379
 2006-11-02 20:12:39 +00:00
Reid Spencer
1abf69e923 For PR950: 
Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369
 2006-11-02 01:53:59 +00:00
Chris Lattner
35cd439221 Allow the getRegForInlineAsmConstraint method to return a register class with 
no fixes physreg.  Treat this as permission to use any register in the register
class.  When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time.  This eliminates a ton
of copies around common inline asms.  For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31366
 2006-11-02 01:41:49 +00:00
Evan Cheng
1da5ee8485 Rename 
llvm-svn: 31364
 2006-11-01 23:18:32 +00:00
Evan Cheng
e57c89ede0 Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together. 
llvm-svn: 31363
 2006-11-01 23:06:55 +00:00
Evan Cheng
1f18eca4f5 Clean up. 
llvm-svn: 31359
 2006-11-01 22:39:30 +00:00
Evan Cheng
5479bb9fc4 CopyFromReg starts a live range so its use should not be considered a floater. 
llvm-svn: 31356
 2006-11-01 22:17:06 +00:00
Chris Lattner
f20968bc33 give branch folding a simple heuristic to decide which block to split so that 
it inserts an uncond branch where it is less likely to cause a problem.  This
fixes some perf issues on ppc.

llvm-svn: 31354
 2006-11-01 19:36:29 +00:00
Evan Cheng
83b0827a2e Add a printSetLabel that takes two id's. 
llvm-svn: 31347
 2006-11-01 09:23:08 +00:00
Evan Cheng
67c04b1f2a Print jumptable index. 
llvm-svn: 31340
 2006-11-01 04:48:30 +00:00
Chris Lattner
b459c08384 make tail merging more aggressive. If two blocks share a common tail, but the 
tail is not an entire block for either of them, pick one, split it, then
merge the common part.

llvm-svn: 31336
 2006-11-01 01:16:12 +00:00
Chris Lattner
5651528580 enable branch folding with an option 
llvm-svn: 31335
 2006-11-01 00:38:31 +00:00
Chris Lattner
850ef9955d Compile CodeGen/PowerPC/fp-branch.ll to: 
_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

instead of:

_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

llvm-svn: 31330
 2006-10-31 23:06:00 +00:00
Chris Lattner
3131b7d6d1 look through isunordered to inline it into branch blocks. 
llvm-svn: 31328
 2006-10-31 22:37:42 +00:00
Chris Lattner
3bc1ad2c4a handle global address constant sdnodes 
llvm-svn: 31323
 2006-10-31 20:01:56 +00:00
Chris Lattner
a44a27dc47 TargetLowering::isOperandValidForConstraint 
llvm-svn: 31319
 2006-10-31 19:41:18 +00:00
Chris Lattner
d9afd310a6 Change the prototype for TargetLowering::isOperandValidForConstraint 
llvm-svn: 31318
 2006-10-31 19:40:43 +00:00
Anton Korobeynikov
e6ba8a819c 1. Clean up code due to changes in SwitchTo*Section(2) 
2. Added partial debug support for mingw\cygwin targets (the same as
   Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
   for storing debug info by default, thus many (runtime) libraries has
   this information included. These formats shouldn't be mixed in one binary
   ('stabs' & 'DWARF'), otherwise binutils tools will be confused.

llvm-svn: 31311
 2006-10-31 08:31:24 +00:00
Chris Lattner
a9f10b25cc Turn an assert into an error message. This is commonly triggered when 
we don't support a specific constraint yet.  When this happens, print the
unsupported constraint.

llvm-svn: 31310
 2006-10-31 07:33:13 +00:00
Evan Cheng
3da8d26445 Fix a typo which can break jumptables. 
llvm-svn: 31305
 2006-10-31 02:31:00 +00:00
Reid Spencer
fe7c10d900 Fix a problem introduced by a last-minute change (logic negation). 
llvm-svn: 31302
 2006-10-30 23:34:32 +00:00
Reid Spencer
db06ed9156 Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4 
generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.

llvm-svn: 31299
 2006-10-30 22:32:30 +00:00
Jim Laskey
df32faedf7 Switch abbreviations to use the folding set.a. 
llvm-svn: 31296
 2006-10-30 15:59:54 +00:00
Jim Laskey
1ccb7c5d03 Simplify DwarfWriter header. 
llvm-svn: 31295
 2006-10-30 13:35:07 +00:00
Evan Cheng
972f469722 Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the target custom lower it. 
llvm-svn: 31293
 2006-10-30 08:00:44 +00:00
Evan Cheng
7437ed9f30 Added a new SDNode type: BR_JT for jumptable branch. 
llvm-svn: 31292
 2006-10-30 07:59:36 +00:00
Chris Lattner
e1b2b2127b Make CanFallThrough more intelligent (so it can handle blocks with (e.g.) no 
successors), and make island block movement more general.

This compiles CodeGen/X86/2006-04-27-ISelFoldingBug.ll to:

_loadAndRLEsource_no_exit_2E_1_label_2E_0:
        subl $8, %esp
        movl %esi, 4(%esp)
        movl %ebx, (%esp)
        movl 16(%esp), %eax
        movl 12(%esp), %ecx
LBB1_3: #label.0
        movl _last, %edx
        movl %edx, %esi
        incl %esi
        movl %esi, _last
        movl %ecx, %ebx
        # TRUNCATE movb %bl, %bl
        movl _block, %esi
        movb %bl, 1(%esi,%edx)
        cmpl %eax, _last
        jge LBB1_2      #codeRepl5.exitStub
LBB1_4: #label.0
        cmpl $257, %ecx
        je LBB1_2       #codeRepl5.exitStub
LBB1_1: #label.0.no_exit.1_crit_edge.exitStub
        movl $1, %eax
        movl (%esp), %ebx
        movl 4(%esp), %esi
        addl $8, %esp
        ret
LBB1_2: #codeRepl5.exitStub
        xorl %eax, %eax
        movl (%esp), %ebx
        movl 4(%esp), %esi
        addl $8, %esp
        ret

instead of:

_loadAndRLEsource_no_exit_2E_1_label_2E_0:
        subl $8, %esp
        movl %esi, 4(%esp)
        movl %ebx, (%esp)
        movl 16(%esp), %eax
        movl 12(%esp), %ecx
        jmp LBB1_3      #label.0
LBB1_1: #label.0.no_exit.1_crit_edge.exitStub
        movl $1, %eax
        movl (%esp), %ebx
        movl 4(%esp), %esi
        addl $8, %esp
        ret
LBB1_2: #codeRepl5.exitStub
        xorl %eax, %eax
        movl (%esp), %ebx
        movl 4(%esp), %esi
        addl $8, %esp
        ret
LBB1_3: #label.0
        movl _last, %edx
        movl %edx, %esi
        incl %esi
        movl %esi, _last
        movl %ecx, %ebx
        # TRUNCATE movb %bl, %bl
        movl _block, %esi
        movb %bl, 1(%esi,%edx)
        cmpl %eax, _last
        jge LBB1_2      #codeRepl5.exitStub
LBB1_4: #label.0
        cmpl $257, %ecx
        jne LBB1_1      #label.0.no_exit.1_crit_edge.exitStub
        jmp LBB1_2      #codeRepl5.exitStub

... which is much better layout :)

llvm-svn: 31282
 2006-10-29 21:05:41 +00:00
Chris Lattner
46a439780e fix Generic/2006-10-29-Crash.ll 
llvm-svn: 31281
 2006-10-29 21:01:20 +00:00
Chris Lattner
0a5d859ae3 Fix a load folding issue that Evan noticed: there is no need to export values 
used by comparisons in the main block.

llvm-svn: 31279
 2006-10-29 18:23:37 +00:00
Evan Cheng
fa1756d048 VLOAD is not the LoadSDNode opcode. 
llvm-svn: 31276
 2006-10-29 06:14:47 +00:00
Nick Lewycky
baef048f71 Remove spurious case. EXTLOAD is not one of the node opcodes. 
llvm-svn: 31275
 2006-10-29 02:26:30 +00:00
Chris Lattner
776740f897 split critical edges more carefully and intelligently. In particular, critical 
edges whose destinations are not phi nodes don't bother us.  Also, share
split edges, since the split edge can't have a phi.  This significantly
reduces the complexity of generated code in some cases.

llvm-svn: 31274
 2006-10-28 19:22:10 +00:00
Chris Lattner
95eed3bd09 Teach branch folding to fold identical jump tables together and to delete 
jump tables that are dead.

llvm-svn: 31273
 2006-10-28 18:34:47 +00:00
Chris Lattner
3c19558b6b const'ify jump table stuff 
llvm-svn: 31269
 2006-10-28 18:17:09 +00:00
Chris Lattner
8f46e97b96 add an assert 
llvm-svn: 31267
 2006-10-28 18:11:20 +00:00
Chris Lattner
2d338110d3 don't print dead jump tables 
llvm-svn: 31266
 2006-10-28 18:10:06 +00:00
Chris Lattner
af9b4c33c2 improve deletion of blocks that just contain branches by knowing that 
the pred block doesn't fall through into them if it's a jumptable.

llvm-svn: 31263
 2006-10-28 17:32:47 +00:00
Jim Laskey
26ac9ac4ad Load and stores have not been uniqued properly. 
llvm-svn: 31261
 2006-10-28 17:25:28 +00:00
Chris Lattner
ee8a70f370 Split *all* critical edges before isel. This resolves issues with spill code 
being inserted on unsplit critical edges, which introduces (sometimes large
amounts of) partially dead spill code.

This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll

llvm-svn: 31260
 2006-10-28 17:04:37 +00:00
Chris Lattner
f44a34d817 Fix a serious bug that caused any x86 vector stuff to infinite loop 
llvm-svn: 31254
 2006-10-28 06:15:26 +00:00
Jim Laskey
17bfaab377 Clean up. 
llvm-svn: 31243
 2006-10-27 23:52:51 +00:00
Chris Lattner
e009249ae1 Fix a bug in merged condition handling (CodeGen/Generic/2006-10-27-CondFolding.ll). 
Add many fewer CFG edges and PHI node entries.  If there is a switch which has
the same block as multiple destinations, only add that block once as a successor/phi
node (in the jumptable case)

llvm-svn: 31242
 2006-10-27 23:50:33 +00:00
Jim Laskey
ef56bc9680 Switch over from SelectionNodeCSEMap to FoldingSet. 
llvm-svn: 31240
 2006-10-27 23:46:08 +00:00