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Commit Graph

9838 Commits

Author SHA1 Message Date
Bob Wilson
f7e9ff1d28 Move duplicated AddLiveIn function from X86 and ARM backends to be a method
in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock.  Thanks for Anton for suggesting this.

llvm-svn: 69615
2009-04-20 18:36:57 +00:00
Devang Patel
64cae580dc Match C backend only if it explicitly requested.
llvm-svn: 69613
2009-04-20 18:07:22 +00:00
Sanjiv Gupta
44b55dc966 Emit the auto variables of a function into a different section than parameters.
llvm-svn: 69605
2009-04-20 16:59:35 +00:00
Mon P Wang
4db825e615 Fixed a few 64 bit cases in X86InstrInfo::commuteInstruction
llvm-svn: 69417
2009-04-18 05:16:01 +00:00
Bill Wendling
0476a0acf3 Recommit r69335 and r69336. These were not causing problems.
llvm-svn: 69394
2009-04-17 22:40:38 +00:00
Bob Wilson
312344e025 Move the AddLiveIn function definition closer to its uses.
llvm-svn: 69382
2009-04-17 20:42:34 +00:00
Bob Wilson
b2ccd16655 Rearrange code to reduce indentation.
llvm-svn: 69381
2009-04-17 20:40:45 +00:00
Bob Wilson
911e92c7a3 Clean up formatting, remove trailing whitespace, fix comment typos and
punctuation.  No functional changes.

llvm-svn: 69378
2009-04-17 20:35:10 +00:00
Bob Wilson
b8756b00cd Use CallConvLower.h and TableGen descriptions of the calling conventions
for ARM.  Patch by Sandeep Patel.

llvm-svn: 69371
2009-04-17 19:07:39 +00:00
Rafael Espindola
d74132e2c5 For general dynamic TLS access we must use
leaq	foo@TLSGD(%rip), %rdi

as part of the instruction sequence. Using a register other than %rdi and then
copying it to %rdi is not valid.

llvm-svn: 69350
2009-04-17 14:35:58 +00:00
Bill Wendling
073e1c91dd Revert r69335 and r69336. They were causing build failures.
llvm-svn: 69347
2009-04-17 04:19:22 +00:00
Dan Gohman
d254f36e54 MOV8rr_NOREX is a "Move" instruction. This doesn't currently
matter, because this instruction isn't generated until after
things that care.

llvm-svn: 69336
2009-04-17 00:45:17 +00:00
Dan Gohman
2349973ff3 Don't use MOV8rr_NOREX on x86-32. It doesn't actually hurt anything at
present, but it's inconsistent.

llvm-svn: 69335
2009-04-17 00:43:09 +00:00
Chris Lattner
d12470d85e Fix some failures in targets on available_externally functions,
this fixes a crash on CodeGen/Generic/externally_available.ll
on ppc hosts.  Thanks to Nicholas L for pointing this out.

llvm-svn: 69333
2009-04-17 00:26:12 +00:00
Rafael Espindola
a07d1c3103 fix PR3995. A scale must be 1, 2, 4 or 8.
llvm-svn: 69284
2009-04-16 12:34:53 +00:00
Dan Gohman
38bc0faa22 Fix 80-column violations.
llvm-svn: 69204
2009-04-15 19:48:57 +00:00
Dan Gohman
a2ec3156eb Add a folding table entry for MOV8rr_NOREX.
llvm-svn: 69203
2009-04-15 19:48:28 +00:00
Dan Gohman
2b965abea4 Fix X86MachineFunctionInfo's doxygen comment.
llvm-svn: 69127
2009-04-15 01:20:18 +00:00
Dan Gohman
56227ee26e Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with
the local register allocator.

llvm-svn: 69115
2009-04-15 00:10:16 +00:00
Dan Gohman
a1fe2a3741 Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when
either the source or destination is a physical h register.

This fixes sqlite3 with the post-RA scheduler enabled.

llvm-svn: 69111
2009-04-15 00:04:23 +00:00
Dan Gohman
1e76e65007 GR8_NOREX can contain the H registers, since they don't require
REX prefixes.

llvm-svn: 69108
2009-04-15 00:00:48 +00:00
Dan Gohman
365c457893 For the h-register addressing-mode trick, use the correct value for
any non-address uses of the address value. This fixes 186.crafty.

llvm-svn: 69094
2009-04-14 22:45:05 +00:00
Evan Cheng
b64f2c1b08 Some of GR8_NOREX registers are only available in 64-bit mode.
llvm-svn: 69049
2009-04-14 16:57:43 +00:00
Sanjiv Gupta
b03b007054 Handle aggregate type arguments to direct and indirect calls.
llvm-svn: 69022
2009-04-14 02:49:52 +00:00
Dan Gohman
8393d29bc8 Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.

llvm-svn: 68986
2009-04-13 21:06:25 +00:00
Devang Patel
ad7f61c279 Reapply 68847.
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.

llvm-svn: 68964
2009-04-13 17:02:03 +00:00
Dan Gohman
be7227005f Implement x86 h-register extract support.
- Add patterns for h-register extract, which avoids a shift and mask,
   and in some cases a temporary register.
 - Add address-mode matching for turning (X>>(8-n))&(255<<n), where
   n is a valid address-mode scale value, into an h-register extract
   and a scaled-offset address.
 - Replace X86's MOV32to32_ and related instructions with the new
   target-independent COPY_TO_SUBREG instruction.

On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.

These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.

llvm-svn: 68962
2009-04-13 16:09:41 +00:00
Dan Gohman
f117bbdbcd Remove x86's special-case handling for ISD::TRUNCATE and
ISD::SIGN_EXTEND_INREG. Tablegen-generated code can handle
these cases, and the scheduling issues observed earlier
appear to be resolved now.

llvm-svn: 68959
2009-04-13 15:29:31 +00:00
Dan Gohman
6e6f9e3a4f Fix copy+pastos in comments.
llvm-svn: 68958
2009-04-13 15:28:29 +00:00
Dan Gohman
ac6a439313 List the l registers before h registers, for consistency.
llvm-svn: 68954
2009-04-13 15:18:42 +00:00
Dan Gohman
e1db797df3 Use X86::SUBREG_8BIT instead of hard-coding the equivalent constant.
llvm-svn: 68951
2009-04-13 15:14:03 +00:00
Dan Gohman
a68d99c707 Add a comment about MOVSX64rr8.
llvm-svn: 68950
2009-04-13 15:13:28 +00:00
Dan Gohman
65bafadd2b Fix another hard-coded constant to use X86AddrNumOperands.
This unbreaks the JIT on x86-64.

llvm-svn: 68948
2009-04-13 15:04:25 +00:00
Rafael Espindola
72347bffce X86-64 TLS support for local exec and initial exec.
llvm-svn: 68947
2009-04-13 13:02:49 +00:00
Sanjiv Gupta
04a7716d62 While passing arg of types larger than char only one byte at lower end was getting passed. We couldn't catch this as we did not have tests that were passing an int value larger than 256.
llvm-svn: 68946
2009-04-13 09:38:38 +00:00
Chris Lattner
c1bfdc9bb2 Add a new "available_externally" linkage type. This is intended
to support C99 inline, GNU extern inline, etc.  Related bugzilla's
include PR3517, PR3100, & PR2933.  Nothing uses this yet, but it
appears to work.

llvm-svn: 68940
2009-04-13 05:44:34 +00:00
Rafael Espindola
ad8137187c In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matching
only if symbolic addresses are RIP relatives.

llvm-svn: 68924
2009-04-12 23:00:38 +00:00
Rafael Espindola
2b0a01bda9 refactor some code into X86DAGToDAGISel::MatchWrapper
llvm-svn: 68915
2009-04-12 21:55:03 +00:00
Chris Lattner
6d6cf3ff4a fix a cross-block fastisel crash handling overflow intrinsics.
See comment for details.  This fixes rdar://6772169

llvm-svn: 68890
2009-04-12 07:51:14 +00:00
Chris Lattner
6a9e77c980 simplify code by using IntrinsicInst.
llvm-svn: 68887
2009-04-12 07:36:01 +00:00
Chris Lattner
da05d37aa1 Add new TargetInstrDesc::hasImplicitUseOfPhysReg and
hasImplicitDefOfPhysReg methods.  Use them to remove a 
look in X86 fast isel.

llvm-svn: 68886
2009-04-12 07:26:51 +00:00
Dan Gohman
ac11c8d30f Revert r68847. It breaks the build on non-Darwin targets, with this message
from the assembler:

Error: unknown pseudo-op: `.debug_inlined'
llvm-svn: 68863
2009-04-11 15:57:04 +00:00
Devang Patel
6f907173e0 Keep track of inlined functions and their locations. This information is collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.)
Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section.

llvm-svn: 68847
2009-04-11 00:16:47 +00:00
Sanjiv Gupta
6962a75641 Added code to handle spilling and reloading of FSRs.
llvm-svn: 68783
2009-04-10 15:10:14 +00:00
Rafael Espindola
88986ef511 Don't fold a load if the other operand is a TLS address.
With this we generate

movl    %gs:0, %eax
leal    i@NTPOFF(%eax), %eax

instead of

movl    $i@NTPOFF, %eax
addl    %gs:0, %eax

llvm-svn: 68778
2009-04-10 10:09:34 +00:00
Chris Lattner
26aee059ba a few fixes to "addrspace(256) is reference offset of GS segment register".
It turns out that there are still several problems with this, will file a bugzilla.

llvm-svn: 68749
2009-04-10 00:16:23 +00:00
Bill Wendling
5d9538852f Pass in the std::string parameter instead of returning it by value.
llvm-svn: 68747
2009-04-10 00:12:49 +00:00
Dan Gohman
8121b3f88d Remove the obsolete SelectionDAG::getNodeValueTypes and simplify
code that uses it by using SelectionDAG::getVTList instead.

llvm-svn: 68744
2009-04-09 23:54:40 +00:00
Owen Anderson
bd340ca405 Give register alias checking the hash table treatment too.
llvm-svn: 68730
2009-04-09 22:19:30 +00:00
Bob Wilson
c53238dff1 Fix pr3954. The register scavenger asserts for inline assembly with
register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).

llvm-svn: 68714
2009-04-09 17:16:43 +00:00