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Commit Graph

188162 Commits

Author SHA1 Message Date
Simon Pilgrim
f81b5149c1 [X86][SSE] Split off generic isLaneCrossingShuffleMask helper. NFC.
Avoid MVT dependency which will be needed in a future patch.
2019-11-23 12:41:03 +00:00
Ehud Katz
d5c0db1892 [PhiValues] Remove redundant map searches
Remove redundant map searches.
For example, every call to "operator[]" is actually translated to a
"find" call, and 2 consecutive calls to the operator, without changing
the map in-between, is just redundant, and inefficient.

Differential Revision: https://reviews.llvm.org/D69337
2019-11-23 10:32:56 +02:00
Sourabh Singh Tomar
361d1af90a [DWARF] Support for loclist.dwo section in llvm and llvm-dwarfdump.
This patch adds support for debug_loclists.dwo section in llvm and llvm-dwarfdump.
Also Fixes PR43622, PR43623.

Reviewers: dblaikie, probinson, labath, aprantl, jini.susan.george

https://reviews.llvm.org/D69462
2019-11-23 10:25:11 +05:30
Reid Kleckner
bc98d63562 [IR] Move global_objects and global_values out of line, NFC
This saves 2.4% of CPU time compiling opt, according to
ClangBuildAnalyzer. These helpers being inlined in the header was
triggering the instantiation of concat_iterator in every TU using
Module.h (~1118 TUs): https://reviews.llvm.org/P8171$35

**** Templates that took longest to instantiate:
 76187 ms: llvm::AnalysisManager<llvm::Function>::getResult<llvm::TargetLibrary... (396 times, avg 192 ms)
 73609 ms: llvm::AnalysisManager<llvm::Function>::getResultImpl (420 times, avg 175 ms)
 49657 ms: llvm::detail::concat_range<llvm::GlobalValue, llvm::iterator_range<l... (1118 times, avg 44 ms)
 49376 ms: llvm::detail::concat_range<const llvm::GlobalValue, llvm::iterator_r... (1118 times, avg 44 ms)
 48167 ms: llvm::iterator_range<llvm::concat_iterator<llvm::GlobalValue, llvm::... (1118 times, avg 43 ms)
 48125 ms: llvm::iterator_range<llvm::concat_iterator<const llvm::GlobalValue, ... (1118 times, avg 43 ms)
 48061 ms: llvm::concat_iterator<llvm::GlobalValue, llvm::ilist_iterator<llvm::... (1118 times, avg 42 ms)
 48014 ms: llvm::concat_iterator<const llvm::GlobalValue, llvm::ilist_iterator<... (1118 times, avg 42 ms)
...

I haven't measured, but I don't think these helpers are performance
critical.  The iterator advance call can still be inlined, which is what
matters for performance.

Remove global_(objects|values)_(begin|end), since they were dead and
would have to be out of line anyway.
2019-11-22 19:26:34 -08:00
Peter Collingbourne
52da15c594 gn build: Reland c52efdc5, "gn build: (manually) merge b5913e6d2f"
Because b5913e6d2f landed again as c54959c0.
2019-11-22 18:13:58 -08:00
Francis Visoiu Mistrih
600ec0d5c6 [Remarks] Allow empty temporary remark files
When parsing bitstream remarks, allow external remark files to be
empty, which means there are no remarks to be parsed.

In the same way, dsymutil should not produce a remark file.
2019-11-22 15:58:12 -08:00
Fangrui Song
f319b282ab [MC] Reorder MCInst fields to make sizeof(MCInst) smaller
sizeof(MCInst) is decreased from 168 to 160 on 64-bit systems.
2019-11-22 14:55:43 -08:00
Evandro Menezes
9e85d58e98 [MCA] Fix test cases (NFC)
Fix the test cases for Exynos M5 that break under Darwin.
2019-11-22 16:19:58 -06:00
LLVM GN Syncbot
283a691725 gn build: Merge 64ada7accbc 2019-11-22 22:15:40 +00:00
Jonas Devlieghere
70be4d27b2 [TableGen] Add backend to generate command guide for tools using libOption.
For lldb and dsymutil, the command guide is essentially a copy of its
help output generated by libOption. Making sure the two stay in sync is
tedious and error prone. Given that we already generate the help from a
tablegen file, we might as well generate the RST as well.

This adds a tablegen backend for generating Sphinx/RST command guides
from the tablegen file.

Differential revision: https://reviews.llvm.org/D70610
2019-11-22 14:10:17 -08:00
Petr Hosek
3ba73f04c0 Reland "[CMake] Support installation of InstrProfData.inc"
This header fragment is useful on its own for any consumer that wants
to use custom instruction profile runtime with the LLVM instrumentation.
The concrete use case is in Fuchsia's kernel where we want to use
instruction profile instrumentation, but we cannot use the compiler-rt
runtime because it's not designed for use in the kernel environment.
This change allows installing this header as part of compiler-rt.

Differential Revision: https://reviews.llvm.org/D64532
2019-11-22 14:09:46 -08:00
LLVM GN Syncbot
c6064e5a55 gn build: Merge ae8a8c2db6c 2019-11-22 21:49:47 +00:00
Davide Italiano
a7bfad4fdc [InstCombine] Fix call guard difference with dbg
Patch by Chris Ye!

Differential Revision: https://reviews.llvm.org/D68004
2019-11-22 13:35:53 -08:00
Tsang Whitney W.H
055646cac9 [CodeMoverUtils] Added an API to check if an instruction can be safely
moved before another instruction.
Summary:Added an API to check if an instruction can be safely moved
before another instruction. In future PRs, we will like to add support
of moving instructions between blocks that are not control flow
equivalent, and add other APIs to enhance usability, e.g. moving basic
blocks, moving list of instructions...
Loop Fusion will be its first user. When there is intervening code in
between two loops, fusion is currently unable to fuse them. Loop Fusion
can use this utility to check if the intervening code can be safely
moved before or after the two loops, and move them, then it can
successfully fuse them.
Reviewer:kbarton,jdoerfert,Meinersbur,bmahjour,etiotto
Reviewed By:bmahjour
Subscribers:mgorny,hiraditya,llvm-commits
Tag:LLVM
Differential Revision:https://reviews.llvm.org/D70049
2019-11-22 21:29:08 +00:00
Evandro Menezes
db1708480a [AArch64] Add the pipeline model for Exynos M5
Add the scheduling and cost models for Exynos M5.
2019-11-22 15:09:17 -06:00
Philip Reames
8c99d48870 Slightly speculative buildbot fix for issue reported in 8293f74 commit thread 2019-11-22 11:37:17 -08:00
Ehud Katz
96773fc887 [APFloat] Enlarge ExponentType to 32bit integer
Enlarge the size of ExponentType from 16bit integer to 32bit. This is
required to prevent exponent overflow/underflow.

Note that IEEEFloat size and alignment don't change in 64bit or 32bit
compilation targets (and in turn, neither does APFloat).

Fixes PR34851.

Differential Revision: https://reviews.llvm.org/D69771
2019-11-22 21:26:35 +02:00
Evgenii Stepanov
99dd30ba23 Reinstate MSan suppression of PR24578.
Summary:
Revert "Rollback of commit "Repress sanitization on User dtor.""

There is no point in keeping an active MSan error in the codebase.
PR24578 tracks the actual UB in LLVM code; this change enables testing
of LLVM with MSAN + -fsanitize-memory-use-after-dtor.

This reverts commit 21c1bc46aee2b69c2c48db8e961f0ce8394f21e1.

Reviewers: vitalybuka

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70611
2019-11-22 11:25:24 -08:00
Ehud Katz
cb1c42531d [APFloat] Fix subtraction of subnormal numbers
Fix incorrect determination of the bigger number out of the two
subtracted, while subnormal numbers are involved.
Fixes PR44010.

Differential Revision: https://reviews.llvm.org/D69772
2019-11-22 21:17:11 +02:00
Julian Lettner
e9ff04cb02 [lit] Attempt to print test summary on CTRL+C 2019-11-22 10:57:33 -08:00
Anton Afanasyev
e2fb2fbbd1 [SLP] Enhance SLPVectorizer to vectorize vector aggregate
Summary:
Vector aggregate is homogeneous aggregate of vectors like `{ <2 x float>, <2 x float> }`.
This patch allows `findBuildAggregate()` to consider vector aggregates as
well as scalar ones. For instance, `{ <2 x float>, <2 x float> }` maps to `<4 x float>`.

Fixes vector part of llvm.org/PR42022

Reviewers: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70068
2019-11-22 20:01:59 +03:00
Hiroshi Yamauchi
7e9bbaa48a [WebAssembly][SelectionDAG] Remove unused WebAssemblyDAGToDAGISel::ForCodeSize.
Summary:
This follows from the discussion at D70095.

D70095 moves hasOptSize calls into SelectionDAG::shouldOptForSize to allow
querying size optimization conditions together with profile guided size
optimization.

Since it appears that size optimizations for WebAssembly SelectionDAG haven't
been implemented yet and thus ForCodeSize is unused, and it would not make a lot
of sense to call shouldOptForSize here as the necessary profile data like
PSI/BFI aren't available at this point, it seems good and less confusing to
remove this for now and use shouldOptForSize when they are implemented in the
future.

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, aheejin, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70567
2019-11-22 09:00:23 -08:00
Kazu Hirata
2d5822b9ea [JumpThreading] NFC: Don't cache F.hasProfileData()
Summary:
With this patch, we no longer cache F.hasProfileData().  We simply
call the function again.

I'm doing this because:

- JumpThreadingPass also has a member variable named HasProfileData,
  which is very confusing,

- the function is very lightweight, and

- this patch makes JumpThreading::runOnFunction more consistent with
  JumpThreadingPass::run.

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70602
2019-11-22 08:51:14 -08:00
Anton Afanasyev
6499b018ea [SLP][Test] Precommit tests for D70068 and D70587. NFC. 2019-11-22 19:47:21 +03:00
Kazu Hirata
a2e554886e [JumpThreading] Use profile data even with the new pass manager
Summary:
Without this patch, the jump threading pass ignores profiling data
whenever we invoke the pass with the new pass manager.

Specifically, JumpThreadingPass::run calls runImpl with class variable
HasProfileData always set to false.  In turn, runImpl sets
HasProfileData to false again:

  HasProfileData = HasProfileData_;

In the end, we don't use profiling data at all with the new pass
manager.

This patch fixes the problem by passing F.hasProfileData() to runImpl.

The bug appears to have been introduced at:

  https://reviews.llvm.org/D41461

which removed local variable HasProfileData in JumpThreadingPass::run
even though there was one more use left in the same function.  As a
result, the remaining use ended referring to the class variable
instead.

Note that F.hasProfileData is an extremely lightweight function, so I
don't see the need to cache its result.  Once this patch is approved,
I'm planning to stop caching the result of F.hasProfileData in
runOnFunction.

Reviewers: wmi, eli.friedman

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70509
2019-11-22 08:21:48 -08:00
Yonghong Song
c03bf16516 [BPF] Fix a recursion bug in BPF Peephole ZEXT optimization
Commit a0841dfe8594 ("[BPF] Fix a bug in peephole optimization")
fixed a bug in peephole optimization. Recursion is introduced
to handle COPY and PHI instructions.

Unfortunately, multiple PHI instructions may form a cycle
and this will cause infinite recursion, eventual segfault.
For Commit a0841dfe8594, I indeed tried a few loops to ensure
that I won't see the recursion, but I did not try with
complex control flows, which, as demonstrated with the test case
in this patch, may introduce PHI cycles.

This patch fixed the issue by introducing a set to remember
visited PHI instructions. This way, cycles can be properly
detected and handled.

Differential Revision: https://reviews.llvm.org/D70586
2019-11-22 08:05:43 -08:00
jasonliu
b9d78d563f [XCOFF][AIX] Read-only data section object file generation
Summary:
This patch is a follow up on read-only assembly patch D70182.
It intends to enable object file generation for the read-only data section on AIX.

Reviewers: DiggerLin, daltenty

Differential Revision: https://reviews.llvm.org/D70455
2019-11-22 15:49:37 +00:00
Clement Courbet
25475a86cf Reland "[DAGCombiner] Allow zextended load combines."
Check that the generated type is simple.
2019-11-22 14:47:18 +01:00
Juneyoung Lee
d55a60579e [Test] Fix freeze ocaml test failure 2019-11-22 22:34:37 +09:00
Pankaj Gode
6e5fd6e850 [WIP][Attributor] AAReachability Attribute
Summary: Working towards Johannes's suggestion for fixme, in Attributor's Noalias attribute deduction.
(ii) Check whether the value is captured in the scope using AANoCapture.
FIXME: This is conservative though, it is better to look at CFG and
// check only uses possibly executed before this call site.

A Reachability abstract attribute answers the question "does execution at point A potentially reach point B". If this question is answered with false for all other uses of the value that might be captured, we know it is not *yet* captured and can continue with the noalias deduction. Currently, information AAReachability provides is completely pessimistic.

    Reviewers: jdoerfert

    Reviewed By: jdoerfert

    Subscribers: uenoku, sstefan1, hiraditya, llvm-commits

    Differential Revision: https://reviews.llvm.org/D70233
2019-11-22 18:40:47 +05:30
Roman Lebedev
9e97862e1f [Codegen] TargetLowering::prepareUREMEqFold(): x u% C1 ==/!= C2 (PR35479)
Summary:
The current lowering is:
```
Name: (X % C1) == C2 -> X * C3 <= C4 || false
Pre: (C2 == 0 || C1 u<= C2) && (C1 u>> countTrailingZeros(C1)) * C3 == 1
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
  =>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = -1 /u C1
%n0 = mul i8 %x, C3
%n1 = lshr i8 %n0, countTrailingZeros(C1) ; rotate right
%n2 = shl i8 %n0, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n3 = or i8 %n1, %n2 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%C4_fixed = select i1 %is_tautologically_false, i8 -1, i8 %C4
%res = icmp ule i8 %n3, %C4_fixed
%r = xor i1 %res, %is_tautologically_false
```
https://rise4fun.com/Alive/2xC
https://rise4fun.com/Alive/jpb5

However, we can support non-tautological cases `C1 u> C2` too.
Said handling consists of two parts:
* `C2 u<= (-1 %u C1)`. It just works. We only have to change `(X % C1) == C2` into `((X - C2) % C1) == 0`
```
Name: (X % C1) == C2 -> (X - C2) * C3 <= C4   iff C2 u<= (-1 %u C1)
Pre: (C1 u>> countTrailingZeros(C1)) * C3 == 1 && C2 u<= (-1 %u C1)
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
  =>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = (-1 /u C1)
%n0 = sub i8 %x, C2
%n1 = mul i8 %n0, C3
%n2 = lshr i8 %n1, countTrailingZeros(C1) ; rotate right
%n3 = shl i8 %n1, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n4 = or i8 %n2, %n3 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%C4_fixed = select i1 %is_tautologically_false, i8 -1, i8 %C4
%res = icmp ule i8 %n4, %C4_fixed
%r = xor i1 %res, %is_tautologically_false
```
https://rise4fun.com/Alive/m4P
https://rise4fun.com/Alive/SKrx
* `C2 u> (-1 %u C1)`. We also have to change `(X % C1) == C2` into `((X - C2) % C1) == 0`,
  and we have to decrement C4:
```
Name: (X % C1) == C2 -> (X - C2) * C3 <= C4   iff C2 u> (-1 %u C1)
Pre: (C1 u>> countTrailingZeros(C1)) * C3 == 1 && C2 u> (-1 %u C1)
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
  =>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = (-1 /u C1)-1
%n0 = sub i8 %x, C2
%n1 = mul i8 %n0, C3
%n2 = lshr i8 %n1, countTrailingZeros(C1) ; rotate right
%n3 = shl i8 %n1, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n4 = or i8 %n2, %n3 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%C4_fixed = select i1 %is_tautologically_false, i8 -1, i8 %C4
%res = icmp ule i8 %n4, %C4_fixed
%r = xor i1 %res, %is_tautologically_false
```
https://rise4fun.com/Alive/d40
https://rise4fun.com/Alive/8cF

I believe this concludes `x u% C1 ==/!= C2` lowering.
In fact, clang is may now be better in this regard than gcc:
as it can be seen from `@t32_6_4` test, we do lower `x % 6 == 4`
via this pattern, while gcc does not: https://godbolt.org/z/XNU2z9
And all the general alive proofs say this is legal.
And manual checking agrees: https://rise4fun.com/Alive/WA2

Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=35479 | PR35479 ]].

Reviewers: RKSimon, craig.topper, spatel

Reviewed By: RKSimon

Subscribers: nick, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70053
2019-11-22 15:22:42 +03:00
Roman Lebedev
e0449de48b [Codegen] TargetLowering::prepareUREMEqFold(): x u% C1 ==/!= C2 with tautological C1 u<= C2 (PR35479)
Summary:
This is a preparatory cleanup before i add more
of this fold to deal with comparisons with non-zero.

In essence, the current lowering is:
```
Name: (X % C1) == 0 -> X * C3 <= C4
Pre: (C1 u>> countTrailingZeros(C1)) * C3 == 1
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, 0
  =>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = -1 /u C1
%n0 = mul i8 %x, C3
%n1 = lshr i8 %n0, countTrailingZeros(C1) ; rotate right
%n2 = shl i8 %n0, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n3 = or i8 %n1, %n2 ; rotate right
%r = icmp ule i8 %n3, %C4
```
https://rise4fun.com/Alive/oqd

It kinda just works, really no weird edge-cases.
But it isn't all that great for when comparing with non-zero.
In particular, given `(X % C1) == C2`, there will be problems
in the always-false tautological case where `C2 u>= C1`:
https://rise4fun.com/Alive/pH3

That case is tautological, always-false:
```
Name: (X % Y) u>= Y
%o0 = urem i8 %x, %y
%r = icmp uge i8 %o0, %y
  =>
%r = false
```
https://rise4fun.com/Alive/ofu

While we can't/shouldn't get such tautological case normally,
we do deal with non-splat vectors, so unless we want to give up
in this case, we need to fixup/short-circuit such lanes.

There are two lowering variants:
1. We can blend between whatever computed result and the correct tautological result
```
Name: (X % C1) == C2 -> X * C3 <= C4 || false
Pre: (C2 == 0 || C1 u<= C2) && (C1 u>> countTrailingZeros(C1)) * C3 == 1
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
  =>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = -1 /u C1
%n0 = mul i8 %x, C3
%n1 = lshr i8 %n0, countTrailingZeros(C1) ; rotate right
%n2 = shl i8 %n0, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n3 = or i8 %n1, %n2 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%res = icmp ule i8 %n3, %C4
%r = select i1 %is_tautologically_false, i1 0, i1 %res
```
https://rise4fun.com/Alive/PjT5
https://rise4fun.com/Alive/1KV

2. We can invert the comparison result
```
Name: (X % C1) == C2 -> X * C3 <= C4 || false
Pre: (C2 == 0 || C1 u<= C2) && (C1 u>> countTrailingZeros(C1)) * C3 == 1
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
  =>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = -1 /u C1
%n0 = mul i8 %x, C3
%n1 = lshr i8 %n0, countTrailingZeros(C1) ; rotate right
%n2 = shl i8 %n0, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n3 = or i8 %n1, %n2 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%C4_fixed = select i1 %is_tautologically_false, i8 -1, i8 %C4
%res = icmp ule i8 %n3, %C4_fixed
%r = xor i1 %res, %is_tautologically_false
```
https://rise4fun.com/Alive/2xC
https://rise4fun.com/Alive/jpb5

3. We can expand into `and`/`or`:
https://rise4fun.com/Alive/WGn
https://rise4fun.com/Alive/lcb5

Blend-one is likely better since we avoid having to load the
replacement from constant pool. `xor` is second best since
it's still pretty general. I'm not adding `and`/`or` variants.

Reviewers: RKSimon, craig.topper, spatel

Reviewed By: RKSimon

Subscribers: nick, hiraditya, xbolva00, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70051
2019-11-22 15:16:03 +03:00
Simon Pilgrim
49530a6327 [X86] Updated strict fp scalar tests and add fp80 tests for D68857 2019-11-22 11:57:21 +00:00
Pankaj Gode
16059e0867 Test commit. 2019-11-22 14:46:43 +05:30
Pavel Labath
96965aa99c [DWARFVerifier] Use the new location list api
Summary:
Instead of going to the debug_loc section directly, use new
DWARFDie::getLocations instead. This means that the code will now
automatically support debug_loclists sections.

This is the last usage of the old debug_loc methods, and they can now be
removed.

Reviewers: dblaikie, JDevlieghere, aprantl, SouraVX

Subscribers: hiraditya, probinson, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70534
2019-11-22 10:08:39 +01:00
QingShan Zhang
7febda48d9 [PowerPC] Implement the vector extend sign instruction pattern match
Power9 has instructions to implement the semantics of SIGN_EXTEND_INREG for vector type.
Mark it as legal and add the match pattern.

Differential Revision: https://reviews.llvm.org/D69601
2019-11-22 08:58:27 +00:00
LLVM GN Syncbot
275824733a gn build: Merge f7170d17a84 2019-11-22 08:12:49 +00:00
LLVM GN Syncbot
942208e867 gn build: Merge aa981c1802d 2019-11-22 08:12:48 +00:00
LLVM GN Syncbot
dde6d8f10b gn build: Merge 95fe54931fd 2019-11-22 08:12:48 +00:00
Nico Weber
e851862563 gn build: (manually) merge dep from f65cfff6 2019-11-22 03:12:25 -05:00
Clement Courbet
2115d5e12b Revert "[DAGCombiner] Allow zextended load combines."
Breaks some bots.
2019-11-22 09:01:08 +01:00
Clement Courbet
5d39b88c68 [DAGCombiner] Allow zextended load combines.
Summary: or(zext(load8(base)), zext(load8(base+1)) -> zext(load16 base)

Reviewers: apilipenko, RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70487
2019-11-22 08:40:19 +01:00
Amy Kwan
64269c1442 [CMake] Fix LLVM build non-determinism on RHEL
On RHEL, the OS tooling (ar, ranlib) is not deterministic by default.
Therefore, we cannot get bit-for-bit identical builds.

The goal of this patch is that it adds the flags required to force determinism.

Differential Revision: https://reviews.llvm.org/D64817
2019-11-21 23:18:11 -06:00
czhengsz
0ce2ab6b1d [PowerPC] combine rlwinm+rlwinm to rlwinm
combine
x3 = rlwinm x3, 27, 5, 31
x3 = rlwinm x3, 19, 0, 12

to
x3 = rlwinm x3, 14, 0, 12

Reviewed by: steven.zhang

Differential Revision: https://reviews.llvm.org/D70374
2019-11-22 00:00:33 -05:00
Wang, Pengfei
146006f6d5 [X86] Add option 'disable-strictnode-mutation' for tests that respect
strict fp semantics. NFCI.
2019-11-22 12:26:55 +08:00
Craig Topper
8c7197a526 [X86] Add test cases for most of the constrained fp libcalls with fp128.
Add explicit setOperation actions for some to match their none
strict counterparts. This isn't required, but makes the code
self documenting that we didn't forget about strict fp. I've
used LibCall instead of Expand since that's more explicitly what
we want.

Only lrint/llrint/lround/llround are missing now.
2019-11-21 18:17:59 -08:00
Craig Topper
6271249f2e [X86] Mark fp128 FMA as LibCall instead of Expand. Add STRICT_FMA as well.
The Expand code would fall back to LibCall, but this makes it
more explicit.
2019-11-21 18:17:57 -08:00
Pengfei Wang
8ec00b9e73 [FPEnv] Add an option to disable strict float node mutating to an normal
float node

This patch add an option 'disable-strictnode-mutation' to prevent strict
node mutating to an normal node.
So we can make sure that the patch which sets strict-node as legal works
correctly.

Patch by Chen Liu(LiuChen3)

Differential Revision: https://reviews.llvm.org/D70226
2019-11-21 18:07:11 -08:00
Alina Sbirlea
44536bc1b7 [LoopInstSimplify] Move MemorySSA verification under flag.
The verification inside loop passes should be done under the
VerifyMemorySSA flag (enabled by EXPESIVE_CHECKS or explicitly with
opt), in order to not add to compile time during regular builds.
2019-11-21 17:01:24 -08:00
Craig Topper
aa342adaa5 [LegalizeDAG][X86] Add support for turning STRICT_FADD/SUB/MUL/DIV into libcalls. Use it for fp128 on x86-64.
This requires a minor hack for f32/f64 strict fadd/fsub to avoid
turning those into libcalls.
2019-11-21 16:19:25 -08:00