Evan Cheng
f90bc9a050
More refactoring.
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llvm-svn: 55528
2008-08-29 06:41:12 +00:00
Daniel Dunbar
1b3e44db87
Add DenseMap::lookup:
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/// lookup - Return the entry for the specified key, or a default
/// constructed value if no such entry exists.
llvm-svn: 55523
2008-08-29 00:48:44 +00:00
Evan Cheng
cdd06ba3f4
Swap fp comparison operands and change predicate to allow load folding.
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llvm-svn: 55521
2008-08-28 23:48:31 +00:00
Evan Cheng
c50df85672
Refactor ARM instruction format definitions into a separate file. No functionality changes.
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llvm-svn: 55518
2008-08-28 23:39:26 +00:00
Dan Gohman
c7b8401b77
Add a target callback for FastISel.
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llvm-svn: 55512
2008-08-28 23:21:34 +00:00
Gabor Greif
5ec5f19852
remove tabs, fix > 80 cols
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llvm-svn: 55511
2008-08-28 23:19:51 +00:00
Bill Wendling
96d5d65b1d
Add another description to my entry.
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llvm-svn: 55510
2008-08-28 23:16:37 +00:00
Gabor Greif
de8ed9f431
just a brain dump for a small tool
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that brings us to 80-col violations
or tabs.
Usage:
visit-violations <file>
At the moment it outputs editor invocations.
llvm-svn: 55509
2008-08-28 23:15:28 +00:00
Chris Lattner
673f4ce5f7
rename destroy -> releaseMemory to properly hook into passmgr.
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llvm-svn: 55508
2008-08-28 22:56:53 +00:00
Nicolas Geoffray
05014c43fa
Add support for JIT exceptions on Darwin. Since we're dealing with libgcc,
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whose darwin code was written after the ability to dynamically register frames,
we need to do special hacks to make things work.
llvm-svn: 55507
2008-08-28 22:34:49 +00:00
Gabor Greif
c3711501ef
fix the output dumbness I have introduced some time ago
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llvm-svn: 55506
2008-08-28 22:32:39 +00:00
Gabor Greif
86c795a8ca
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
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llvm-svn: 55504
2008-08-28 21:40:38 +00:00
Dan Gohman
481731693d
Implement null and undef values for FastISel.
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llvm-svn: 55500
2008-08-28 21:19:07 +00:00
Mon P Wang
7566974359
In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN
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llvm-svn: 55499
2008-08-28 21:04:05 +00:00
Dan Gohman
35a69c106a
Optimize DAGCombiner's worklist processing. Previously it started
...
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.
This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.
llvm-svn: 55498
2008-08-28 21:01:56 +00:00
Dan Gohman
9a6f5b0bdd
Move CaseBlock, JumpTable, and BitTestBlock to be members of
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SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.
llvm-svn: 55497
2008-08-28 20:38:18 +00:00
Dan Gohman
f8e43fa400
Fix a FastISel bug where the instructions from lowering the arguments
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were being emitted after the first instructions of the entry block.
llvm-svn: 55496
2008-08-28 20:28:56 +00:00
Rafael Espindola
1cd4fc3111
Use resize instead of reserve. Reserve doesn't change size().
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llvm-svn: 55486
2008-08-28 18:32:53 +00:00
Rafael Espindola
31c516aabe
Reduce the size of the Parts vector.
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llvm-svn: 55483
2008-08-28 18:29:58 +00:00
Owen Anderson
675ace60a1
Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG.
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llvm-svn: 55482
2008-08-28 18:26:01 +00:00
Owen Anderson
a5b87bf7e2
Add support for fast-isel of opcodes that require use of extract_subreg. Because of how extract_subreg is treated, it requires special case handling.
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llvm-svn: 55480
2008-08-28 18:06:12 +00:00
Dale Johannesen
e9a1266213
Implement partial-word binary atomics on ppc.
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llvm-svn: 55478
2008-08-28 17:53:09 +00:00
Owen Anderson
8c991b6f8a
FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
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llvm-svn: 55476
2008-08-28 17:47:37 +00:00
Dan Gohman
8f4d612996
Revert r55467; it causes regressions in UnitTests/Vector/divides,
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Benchmarks/sim/sim, and others on x86-64.
llvm-svn: 55475
2008-08-28 17:22:54 +00:00
Rafael Espindola
17b967216a
Correctly resize the Parts array.
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llvm-svn: 55471
2008-08-28 14:24:45 +00:00
Evan Cheng
28b0b18082
If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy.
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llvm-svn: 55467
2008-08-28 07:53:51 +00:00
Evan Cheng
419506a149
FsFLD0S{S|D} and V_SETALLONES are as cheap as moves.
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llvm-svn: 55466
2008-08-28 07:52:25 +00:00
Chris Lattner
bd43eec286
Make the verifier reject instructions which have null pointers
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for operands: rdar://6179606. no testcase, because I can't write
a .ll file that is this broken ;-)
llvm-svn: 55460
2008-08-28 04:02:44 +00:00
Chris Lattner
460b89cb3a
Clear the intervals list in "destroy", patch by
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Prakash Prabhu!
llvm-svn: 55458
2008-08-28 03:33:03 +00:00
Dale Johannesen
490c016734
Split the ATOMIC NodeType's to include the size, e.g.
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ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.
This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad. This is the alternative.
llvm-svn: 55457
2008-08-28 02:44:49 +00:00
Dale Johannesen
ae522b8463
This test crashes on non-x86 host; make SSE explicit.
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Feel free to fix a better way!
llvm-svn: 55456
2008-08-28 01:51:09 +00:00
Dan Gohman
e60a9d002f
Fix a missing #include. Patch by Andrew John Hughes.
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llvm-svn: 55451
2008-08-28 00:20:07 +00:00
Dan Gohman
3a89011a01
Reorganize the lifetimes of the major objects SelectionDAGISel
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works with.
SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.
This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.
This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.
llvm-svn: 55450
2008-08-27 23:52:12 +00:00
Owen Anderson
bb32ae5803
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
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llvm-svn: 55439
2008-08-27 22:30:02 +00:00
Bill Wendling
0b5b31a0be
Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the
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SSE2 registers as well as the MMX registers.
llvm-svn: 55436
2008-08-27 21:32:04 +00:00
Bill Wendling
84547c2a09
Put file scoped constants in an anonymous namespace. Use the "using namespace
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llvm" for consistency.
llvm-svn: 55435
2008-08-27 21:10:13 +00:00
Evan Cheng
cf2cb4da82
Move the check whether it's worth remating to caller.
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llvm-svn: 55434
2008-08-27 20:58:54 +00:00
Devang Patel
7abe1944ae
Do not apply the transformation if the target does not support DestTy natively.
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llvm-svn: 55433
2008-08-27 20:55:23 +00:00
Devang Patel
c4040a69b7
Backout 55429
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llvm-svn: 55432
2008-08-27 20:51:49 +00:00
Dan Gohman
9e928e0b1f
Fix FastISel's bitcast code for the case where getRegForValue fails.
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llvm-svn: 55431
2008-08-27 20:41:38 +00:00
Evan Cheng
dc202f4bba
Refactor isSafeToReMat out of 2addr pass.
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llvm-svn: 55430
2008-08-27 20:33:50 +00:00
Devang Patel
369cc38542
Add facility to create a target.
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llvm-svn: 55429
2008-08-27 20:00:27 +00:00
Owen Anderson
0b1a8af290
Use TargetLowering to get the types in fast isel, which handles pointer types correctly for our purposes.
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llvm-svn: 55428
2008-08-27 18:58:30 +00:00
Dan Gohman
b76e1ca974
Don't check TLI.getOperationAction. The FastISel way is to
...
just try to do the action and let the tablegen-generated code
determine if there is target-support for an operation.
llvm-svn: 55427
2008-08-27 18:15:05 +00:00
Dan Gohman
d5e34d9dce
Add a new FastISel method, getRegForValue, which takes care of
...
the details of materializing constants and other values into
registers, and make use of it in several places.
llvm-svn: 55426
2008-08-27 18:10:19 +00:00
Dan Gohman
6174651396
Add a comment about the current floating-point constant code in FastISel.
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llvm-svn: 55425
2008-08-27 18:01:42 +00:00
Devang Patel
23569e6a1f
Fix typos and whitespaces. Other cosmetic changes based on feedback.
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llvm-svn: 55424
2008-08-27 17:50:18 +00:00
Chris Lattner
551cf02a2d
Minor cleanup.
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llvm-svn: 55423
2008-08-27 17:36:58 +00:00
Dan Gohman
3976cccecd
Reinstate the x86-64 portion of r55190. When doing extloads into
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64-bit registers from 16-bit and smaller memory locations, prefer
instructions that define the entire 64-bit register, to avoid
partial-register updates.
llvm-svn: 55422
2008-08-27 17:33:15 +00:00
Dan Gohman
d9e0302919
Optimize ScheduleDAGRRList's topological sort to use one pass instead
...
of two, and to not need a scratch std::vector. Also, compute the ordering
immediately in the result array, instead of in another scratch std::vector
that is copied to the result array.
llvm-svn: 55421
2008-08-27 16:29:48 +00:00