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fbd40904c1
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7562 Commits

Author SHA1 Message Date
Gabor Greif
fbd40904c1 Simplify the logic of getting hold of a PHI predecessor block. 
There is now a direct way from value-use-iterator to incoming block in PHINode's API.
This way we avoid the iterator->index->iterator trip, and especially the costly
getOperandNo() invocation. Additionally there is now an assertion that the iterator
really refers to one of the PHI's Uses.

llvm-svn: 62869
 2009-01-23 19:40:15 +00:00
Nate Begeman
4de6ffb743 Add support for deleting a module provider from a JIT in such a way that it does not cause the owned module to be fully materialized. 
llvm-svn: 62864
 2009-01-23 19:27:28 +00:00
Evan Cheng
7cdc6e4f8c Cross register class coalescing. Not yet enabled. 
llvm-svn: 62832
 2009-01-23 02:15:19 +00:00
Gabor Greif
d56b0a8c03 introduce a useful abstraction to find out if a Use is in the call position of an instruction 
llvm-svn: 62788
 2009-01-22 21:35:57 +00:00
Tanya Lattner
11d2325f0a Regenerated configure after backing out 62553 and r62616. 
llvm-svn: 62778
 2009-01-22 20:11:17 +00:00
Chris Lattner
da545d3918 rename methods in System/Host to be more consistent. 
llvm-svn: 62776
 2009-01-22 19:53:00 +00:00
Bob Wilson
186046e657 Add SelectionDAG::getNOT method to construct bitwise NOT operations, 
corresponding to the "not" and "vnot" PatFrags.  Use the new method
in some places where it seems appropriate.

llvm-svn: 62768
 2009-01-22 17:39:32 +00:00
Evan Cheng
c971801ae1 Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead. 
llvm-svn: 62762
 2009-01-22 09:10:11 +00:00
Tanya Lattner
98382d83c1 Bump to 2.6svn. 
Regenerate configure (last regen was with the wrong version).

llvm-svn: 62751
 2009-01-22 05:17:59 +00:00
Bill Wendling
ffdc0db38b The operator<() and operator>() were reversing their tests. Have the test the correct way. 
llvm-svn: 62745
 2009-01-22 03:05:10 +00:00
Bill Wendling
b7de7afd32 Get rid of warning about implicit 64-to-32 bit conversions. 
llvm-svn: 62741
 2009-01-22 02:10:33 +00:00
Steve Naroff
375325e8c1 Add explicit this-> (to make the VS compiler happy). 
llvm-svn: 62731
 2009-01-21 23:49:23 +00:00
Douglas Gregor
0a0af6b767 Fix ilist two-phase name lookup 
llvm-svn: 62724
 2009-01-21 22:38:44 +00:00
Dan Gohman
d469bd5137 Add a comment to SelectionDAG::ReplaceAllUsesWith to describe a subtle 
iteraction with SelectionDAG CSE.

llvm-svn: 62713
 2009-01-21 20:50:09 +00:00
Dale Johannesen
a5699a1e8b Do not use host floating point types when emitting 
ASCII IR; loading and storing these can change the
bits of NaNs on some hosts.  Remove or add warnings
at a few other places using host floating point;
this is a bad thing to do in general.

llvm-svn: 62712
 2009-01-21 20:32:55 +00:00
Duncan Sands
392dc77fc6 Cleanup whitespace and comments, and tweak some 
prototypes, in operand type legalization.  No
functionality change.

llvm-svn: 62680
 2009-01-21 09:00:29 +00:00
Sanjiv Gupta
074553c4fb Allow targets to legalize operations (with illegal operands) that produces multiple values. For example, a load with an illegal operand (a load produces two values, a value and chain). 
llvm-svn: 62663
 2009-01-21 04:48:39 +00:00
Dale Johannesen
6854f86296 Make special cases (0 inf nan) work for frem. 
Besides APFloat, this involved removing code
from two places that thought they knew the
result of frem(0., x) but were wrong.

llvm-svn: 62645
 2009-01-21 00:35:19 +00:00
Devang Patel
c129e798c7 Encode member accessibility. 
llvm-svn: 62638
 2009-01-21 00:08:04 +00:00
Devang Patel
bb4362571a Appropriately mark fowrad decls. 
llvm-svn: 62625
 2009-01-20 22:27:02 +00:00
Evan Cheng
5bea79c062 Fix PR3243: a LiveVariables bug. When HandlePhysRegKill is checking whether the last reference is also the last def (i.e. dead def), it should also check if last reference is the current machine instruction being processed. This can happen when it is processing a physical register use and setting the current machine instruction as sub-register's last ref. 
llvm-svn: 62617
 2009-01-20 21:25:12 +00:00
Devang Patel
2f92bb62a8 indentation... 
llvm-svn: 62603
 2009-01-20 19:23:29 +00:00
Devang Patel
ccc3162f69 Need only one set of debug info versions enum. 
llvm-svn: 62602
 2009-01-20 19:22:03 +00:00
Evan Cheng
b3c82db63d Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 
llvm-svn: 62600
 2009-01-20 19:12:24 +00:00
Devang Patel
10237f3666 zap white spaces. 
llvm-svn: 62598
 2009-01-20 19:08:39 +00:00
Dale Johannesen
c9e6e85a38 Add an IEEE remainder function, which is not 
fully implemented yet and not used.  This is
mainly to clarify that APFloat::mod implements
C fmod, not remainder.

llvm-svn: 62593
 2009-01-20 18:35:05 +00:00
Chris Lattner
816e00f6a0 eliminate use of uint32_t to improve compatibility with cygwin 
llvm-svn: 62591
 2009-01-20 18:23:14 +00:00
Devang Patel
6bd9ebdef8 Enable debug info for composite types. 
llvm-svn: 62589
 2009-01-20 18:13:03 +00:00
Evan Cheng
38bf18b556 Spacing 
llvm-svn: 62584
 2009-01-20 17:30:40 +00:00
Duncan Sands
7d2ea3c6de If a vector is empty, you're not allowed to access any 
elements, even if it is only to take the address.  Test:
break-anti-dependencies.ll with ENABLE_EXPENSIVE_CHECKS.

llvm-svn: 62576
 2009-01-20 09:05:19 +00:00
Devang Patel
7c2157602d Verify debug info. 
llvm-svn: 62545
 2009-01-19 23:21:49 +00:00
Dan Gohman
02b5657666 Remove SDNode's virtual destructor. This makes it impossible for 
SDNode subclasses to keep state that requires non-trivial
destructors, however it was already effectively impossible,
since the destructor isn't actually ever called. There currently
aren't any SDNode subclasses affected by this, and in general
it's desireable to keep SDNode objects light-weight.

This eliminates the last virtual member function in the SDNode
class, so it eliminates the need for a vtable pointer, making
SDNode smaller.

llvm-svn: 62539
 2009-01-19 22:39:36 +00:00
Chris Lattner
45a7b5ce57 improve compatibility with cygwin, patch by Jay Foad! 
llvm-svn: 62535
 2009-01-19 22:00:18 +00:00
Devang Patel
52724d5df5 DebugInfo is a lightweight APIs and consumers are expected to use light objects directly. There is no need to support isa<>, dyn_cast<> etc... 
llvm-svn: 62527
 2009-01-19 21:13:39 +00:00
Sanjiv Gupta
5a5af71ca2 Few targets like PIC16 wants libcall generation for illegal type i16. 
llvm-svn: 62467
 2009-01-18 18:25:27 +00:00
Duncan Sands
ddfeabbab7 BasicAliasAnalysis and FunctionAttrs were both 
doing very similar pointer capture analysis.
Factor out the common logic.  The new version
is from FunctionAttrs since it does a better
job than the version in BasicAliasAnalysis

llvm-svn: 62461
 2009-01-18 12:19:30 +00:00
Gabor Greif
d46326b0da make comparisons a bist faster 
llvm-svn: 62428
 2009-01-17 19:03:45 +00:00
Gabor Greif
20f36c51bd introduce typedef for complicated vector, and use it too 
llvm-svn: 62384
 2009-01-17 00:09:08 +00:00
Mikhail Glushenkov
b0aa02acee Support for multi-valued options in CommandLine 
Makes possible to specify options that take multiple arguments (a-la
-sectalign on Darwin). See documentation for details.

llvm-svn: 62372
 2009-01-16 22:54:19 +00:00
Dan Gohman
3d0633627d Instead of adding dependence edges between terminator instructions 
and every other instruction in their blocks to keep the terminator
instructions at the end, teach the post-RA scheduler how to operate
on ranges of instructions, and exclude terminators from the range
of instructions that get scheduled.

Also, exclude mid-block labels, such as EH_LABEL instructions, and
schedule code before them separately from code after them. This
fixes problems with the post-RA scheduler moving code past
EH_LABELs.

llvm-svn: 62366
 2009-01-16 22:10:20 +00:00
Evan Cheng
c4d19d6e8c CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions. 
llvm-svn: 62356
 2009-01-16 20:57:18 +00:00
Chris Lattner
4ebfbc8e6c remove a dead method. 
llvm-svn: 62354
 2009-01-16 20:26:53 +00:00
Duncan Sands
ecfbe4521c Get this building with gcc-4.4. 
llvm-svn: 62322
 2009-01-16 15:54:57 +00:00
Mikhail Glushenkov
49be18cfc6 Registry.h should not depend on CommandLine.h. 
Split Support/Registry.h into two files so that we have less to
recompile every time CommandLine.h is changed.

llvm-svn: 62312
 2009-01-16 07:02:28 +00:00
Mikhail Glushenkov
5000223556 Delete trailing whitespace. 
llvm-svn: 62307
 2009-01-16 06:53:46 +00:00
Sanjiv Gupta
abf4207734 Reverting back 62301. 
llvm-svn: 62304
 2009-01-16 05:06:35 +00:00
Sanjiv Gupta
d54cf794a5 Few targets do not have a single directive to emit global constants. 
For example, PIC16 needs to break a long or int constant into mulitple parts and emit multiple directives. So Allow targets to overried EmitConstantValueOnly().

llvm-svn: 62301
 2009-01-16 02:45:46 +00:00
Dan Gohman
c5b1dbdb4e Initial hazard recognizer support in post-pass scheduling. This includes 
a new toy hazard recognizier heuristic which attempts to direct the
scheduler to avoid clumping large groups of loads or stores too densely.

llvm-svn: 62291
 2009-01-16 01:33:36 +00:00
Devang Patel
1ee58c7d8c Validate dbg_* intrinsics before lowering them. 
llvm-svn: 62286
 2009-01-15 23:41:32 +00:00
Dan Gohman
3e0dcbbd15 Generalize the HazardRecognizer interface so that it can be used 
to support MachineInstr-based scheduling in addition to
SDNode-based scheduling.

llvm-svn: 62284
 2009-01-15 22:18:12 +00:00