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Commit Graph

8 Commits

Author SHA1 Message Date
Bob Wilson
67c88e4977 Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
This does not move entirely to UAL syntax, since the default "increment after"
suffix is empty but we still use "IA" for that.

llvm-svn: 98635
2010-03-16 16:19:07 +00:00
Nick Lewycky
503ef79cc5 Make this test pass on Linux.
llvm-svn: 91521
2009-12-16 07:35:25 +00:00
Anton Korobeynikov
eee906f4f0 Dynamic stack realignment use of sp register as source/dest register
in "bic sp, sp, #15" leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4

llvm-svn: 90724
2009-12-06 22:39:50 +00:00
Evan Cheng
987b8c3d9a More consistent thumb1 asm printing.
llvm-svn: 89328
2009-11-19 06:57:41 +00:00
Jim Grosbach
9f37156ae5 Update test
llvm-svn: 86614
2009-11-09 22:59:01 +00:00
Dan Gohman
142428ce64 Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81293
2009-09-09 00:09:15 +00:00
Evan Cheng
48b49cf5b9 It turns out most of the thumb2 instructions are not allowed to touch SP. The semantics of such instructions are unpredictable. We have just been lucky that tests have been passing.
This patch takes pain to ensure all the PEI lowering code does the right thing when lowering frame indices, insert code to manipulate stack pointers, etc. It's also custom lowering dynamic stack alloc into pseudo instructions so we can insert the right instructions at scheduling time.

This fixes PR4659 and PR4682.

llvm-svn: 78361
2009-08-07 00:34:42 +00:00
Evan Cheng
b740190d2e - More refactoring. This gets rid of all of the getOpcode calls.
- This change also makes it possible to switch between ARM / Thumb on a
  per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
  using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.

llvm-svn: 77300
2009-07-28 05:48:47 +00:00