Evan Cheng
0226113ed5
* Added lowering hook for external weak global address. It inserts a load
...
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
llvm-svn: 24888
2005-12-21 02:39:21 +00:00
Evan Cheng
c87099506c
It's essential we clear CodeGenMap after isel every basic block!
...
llvm-svn: 24867
2005-12-19 22:36:02 +00:00
Evan Cheng
56649f9616
Darwin API issue: indirect load of external and weak symbols.
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llvm-svn: 24775
2005-12-17 09:13:43 +00:00
Evan Cheng
c308dfb801
Added truncate.
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llvm-svn: 24760
2005-12-17 02:02:50 +00:00
Evan Cheng
5d90b26707
Added support for cmp, test, and conditional move instructions.
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llvm-svn: 24756
2005-12-17 01:24:02 +00:00
Evan Cheng
43152cb8b6
* Promote all 1 bit entities to 8 bit.
...
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.
llvm-svn: 24726
2005-12-15 19:49:23 +00:00
Evan Cheng
cc6efa8b6f
Handling zero extension of 1 bit value.
...
llvm-svn: 24722
2005-12-15 01:02:48 +00:00
Evan Cheng
76923d3512
When SelectLEAAddr() fails, it shouldn't cause the side effect of having the
...
base or index operands being selected.
llvm-svn: 24674
2005-12-12 21:49:40 +00:00
Evan Cheng
cf34770b28
For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
...
first before the chain.
e.g.
int X;
int foo(int x)
{
x += X + 37;
return x;
}
If chain operand is selected first, we would generate:
movl X, %eax
movl 4(%esp), %ecx
leal 37(%ecx,%eax), %eax
rather than
movl $37, %eax
addl 4(%esp), %eax
addl X, %eax
which does not require %ecx. (Due to ADD32rm not matching.)
llvm-svn: 24673
2005-12-12 20:32:18 +00:00
Evan Cheng
56f62789d7
* Added X86 store patterns.
...
* Added X86 dec patterns.
llvm-svn: 24654
2005-12-10 00:48:20 +00:00
Evan Cheng
1712ee5ab9
* Added intelligence to X86 LEA addressing mode matching routine so it returns
...
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.
llvm-svn: 24635
2005-12-08 02:01:35 +00:00
Evan Cheng
f1352fa7d6
Proper support for shifts with register shift value.
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llvm-svn: 24559
2005-12-01 00:43:55 +00:00
Chris Lattner
b88f251144
SelectNodeTo now returns its result, we must pay attention to it.
...
llvm-svn: 24550
2005-11-30 22:59:19 +00:00
Evan Cheng
bc51bc83b6
Added support to STORE and shifts to DAG to DAG isel.
...
llvm-svn: 24525
2005-11-30 02:51:20 +00:00
Chris Lattner
6e0171ba8b
Add load and other support to the dag-dag isel. Patch contributed by Evan
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Cheng!
llvm-svn: 24419
2005-11-19 02:11:08 +00:00
Chris Lattner
fec54e57a0
Add patterns for several simple instructions that take i32 immediates.
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Patch contributed by Evan Cheng!
llvm-svn: 24382
2005-11-16 22:59:19 +00:00
Chris Lattner
9caa214f72
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
...
by Evan Cheng!
llvm-svn: 24371
2005-11-16 01:54:32 +00:00
