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213302 Commits

Author SHA1 Message Date
Joel E. Denny
fcd363afd3 [FileCheck] Fix -dump-input per-pattern diagnostic indexing
In input dump annotations, `check:2'1` indicates diagnostic 1 for the
`CHECK` directive on check file line 2.  Without this patch,
`-dump-input` computes the diagnostic index with the assumption that
FileCheck *consecutively* produces all diagnostics for the same
pattern.  Already, that can be a false assumption, as in the examples
below.  Moreover, it seems like a brittle assumption as FileCheck
evolves.  Finally, it actually complicates the implementation even if
it makes it slightly more efficient.

This patch avoids that assumption.  Examples below show results after
applying this patch.  Before applying this patch, `'N` is omitted
throughout these examples because the implementation doesn't notice
there's more than one diagnostic per pattern.

First, `CHECK-LABEL` violates the assumption because `CHECK-LABEL`
tries to match twice, and other directives can match in between:

```
$ cat check
CHECK: foobar
CHECK-LABEL: foobar

$ FileCheck -vv check < input |& tail -8
<<<<<<
           1: text
           2: foobar
label:2'0     ^~~~~~
check:1       ^~~~~~
label:2'1           X error: no match found
           3: text
>>>>>>
```

Second, `--implicit-check-not` is obviously processed many times among
other directives:

```
$ cat check
CHECK: foo
CHECK: foo

$ FileCheck -vv -dump-input=always -implicit-check-not=foo \
            check < input |& tail -16
<<<<<<
            1: text
not:imp1'0     X~~~~
            2: foo
check:1        ^~~
not:imp1'1        X
            3: text
not:imp1'1     ~~~~~
            4: foo
check:2        ^~~
not:imp1'2        X
            5: text
not:imp1'2     ~~~~~
            6:
eof:2          ^
>>>>>>
```

Reviewed By: thopre, jhenderson

Differential Revision: https://reviews.llvm.org/D97813
2021-03-27 10:36:21 -04:00
Nikita Popov
4cf39be5a9 [BasicAA] Correct handle implicit sext in decomposition
While explicit sext instructions were handled correctly, the
implicit sext that occurs if the offset is smaller than the
pointer size blindly assumed that sext(X * Scale + Offset) is the
same as sext(X) * Scale + Offset, which is obviously not correct.

Fix this by extracting the code that handles linear expression
extension and reusing it for the implicit sext as well.
2021-03-27 15:15:47 +01:00
Nikita Popov
13fbfb64c9 [BasicAA] Clarify entry values of GetLinearExpression() (NFC)
A number of variables need to be correctly initialized on entry
to GetLinearExpression() for the implementation to behave reasonably.

The fact that SExtBits can currenlty be non-zero on entry is a bug,
as demonstrated by the added test: For implicit sexts by the GEP,
we do currently skip legality checks.
2021-03-27 14:50:09 +01:00
Nikita Popov
50e408c21a [BasicAA] Bail out earlier for invalid shift amount
Currently, we'd produce an incorrect decomposition, because we
already recursively called GetLinearExpression(), so the Scale=1,
Offset=0 will not necessarily be relative to the shl itself.

Now, this doesn't actually matter for functional correctness,
because such a shift is poison anyway, so its okay to return
an incorrect decomposition. It's still unnecessarily confusing
though, and we can easily avoid this by checking the bitwidth
earlier.
2021-03-27 12:41:16 +01:00
Nikita Popov
f99cc32fd4 [BasicAA] Retain shl nowrap flags in GetLinearExpression()
Nowrap flags between mul and shl differ in that mul nsw allows
multiplication of 1 * INT_MIN, while shl nsw does not. This means
that it is always fine to transfer shl nowrap flags to muls, but
not necessarily the other way around. In this case the NUW/NSW
results refer to mul/add operations, so it's fine to retain the
flags from the shl.
2021-03-27 12:26:22 +01:00
Simon Pilgrim
cdae6be18a [X86][SSE] combineX86ShuffleChain - attempt to recognise 'hidden' identity shuffles
See if the combined shuffle mask is equivalent to an identity shuffle, typically this is due to repeated LHS/RHS ops in horiz-ops, but isTargetShuffleEquivalent might see other patterns as well.

This is another small step towards getting rid of foldShuffleOfHorizOp and relying on canonicalizeShuffleMaskWithHorizOp and generic shuffle combining.
2021-03-27 11:09:30 +00:00
Juneyoung Lee
c9eefe2dea Make FoldBranchToCommonDest poison-safe by default
This is a small patch to make FoldBranchToCommonDest poison-safe by default.
After fc3f0c9c, only two syntactic changes are needed to fix unit tests.
This does not cause any assembly difference in testsuite as well (-O3, X86-64 Manjaro).

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D99452
2021-03-27 19:05:12 +09:00
Sanjay Patel
64dc4c67c5 [x86] prevent crashing while matching pmaddwd
This could crash in 2 ways: either one or both of
the input vectors could be a different size than
the math ops.

https://llvm.org/PR49716
2021-03-27 05:27:14 -04:00
Juneyoung Lee
2997640c0f [IRCE] Use m_LogicalAnd
This is a minor fix to use m_LogicalAnd.
This allows IRCE to recognize select form of and conditions as well.
2021-03-27 15:23:18 +09:00
George Burgess IV
f2c39381e1 docs: Adding Google representative to the security group
This adds me as a Google representative for the LLVM security group.

This was proposed, discussed, and voted on in the differential revision
linked below; please see it for more information.

Differential Revision: https://reviews.llvm.org/D99232
2021-03-26 18:55:37 -07:00
Craig Topper
562d73cb79 [RISCV] Merge FMulAdd and FMulSub scheduler classes to a single FMA scheduler class. NFC
It's unlikely that FMADD and FMSUB would have different scheduling
information so merge them.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D99140
2021-03-26 16:37:20 -07:00
Hongtao Yu
515f49499f [CSSPGO][NFC] Fix a debug dump issue.
During context promotion, intermediate nodes that are on a call path but do not come with a profile can be promoted together with their parent nodes. Do not print sample context string for such nodes since they do not have profile.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D99441
2021-03-26 16:06:56 -07:00
Chris Lattner
20b2eb8304 Add a missing file header comment, NFC. 2021-03-26 15:34:04 -07:00
Craig Topper
e856ce428c [RISCV] Add scheduler classes for the Zba and Zbb extensions.
I've used IALU for the simplest operations from Zbb:
min, minu, max, maxu, sext.b, sext.h, zext.h, andn, orn, xnor

I've put add.uw in IALU32 and slli.uw in ShiftImm32.

Remaining instructions have received new classes.
All 3 sh*add are grouped together. sh*add.uw are grouped together.
Rotate left and right are together. Everything else got their own
class containing one instruction.

I think what I have here is the minimum granularity we need. I
could be convinced that we need more classes.

Reviewed By: evandro

Differential Revision: https://reviews.llvm.org/D99040
2021-03-26 14:15:29 -07:00
Josh Berdine
859df511df [NFC][OCaml] Resolve a couple more compilation warnings
Followup to: 0b1dc49ca38a [NFC][OCaml] Resolve const and unsigned compilation warnings

Differential Revision: https://reviews.llvm.org/D99420
2021-03-26 20:56:19 +00:00
Nikita Popov
9c42462d88 Revert "[ArgPromotion] Copy additional metadata for loads."
This reverts commit 166620a4f01f10e688428caf132a147c0acc9183.

A miscompile has been reported in https://reviews.llvm.org/D93927#2653480
and following.
2021-03-26 21:34:54 +01:00
Florian Hahn
ef79ba8304 [ConstraintElimination] Only strip casts preserving the representation.
Things like addrspacecast may not be no-ops, so we should not look
through them.
2021-03-26 20:07:41 +00:00
Nikita Popov
86d338c7f7 [ValueTracking] Handle shl pair in isKnownNonEqual()
Handle (x << s) != (y << s) where x != y and the shifts are
non-wrapping. Once again, this establishes parity with the
corresponing mul fold that already exists. The shift case is
more powerful because we don't need to guard against multiplies
by zero.
2021-03-26 20:21:05 +01:00
Nikita Popov
81d01bceaa [ValueTracking] Handle shl in isKnownNonEqual()
This handles the pattern X != X << C for non-zero X and C and a
non-overflowing shift. This establishes parity with the corresponing
fold for multiplies.
2021-03-26 20:21:05 +01:00
Nikita Popov
81173d98df [ValueTracking] Add tests for non equal shifts (NFC) 2021-03-26 20:21:05 +01:00
Giorgis Georgakoudis
440b1626f9 [Utils] Add prefix parameter in update test checks to avoid FileCheck conflicts
IR values convert to check prefix FileCheck variables for IR checks. For example, nameless values, e.g., %0, convert to check prefix TMP FileCheck variables, e.g., [[TMP0:%.*]]. This check prefix may clash with named values that have the same name and that causes auto-generated tests to fail. Currently a warning is emitted to change the names of the IR values but this is not always possible, if for example they are generated by clang. Manual intervention to fix the FileCheck variable names is too tedious. This patch add a parameter to prefix conflicting FileCheck variable names with a user-provided string to automate the process.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D99415
2021-03-26 11:49:42 -07:00
Florian Hahn
6041c29d51 [ConstraintElimination] Add additional pointercast tests.
Add coverage for pointercasts other than bitcast. addrspacecast are not
handled properly at the moment.
2021-03-26 17:52:46 +00:00
Sanjay Patel
d84adfbff5 [SLP] use dyn_cast instead of isa + cast; NFC 2021-03-26 13:52:31 -04:00
Stefan Gränitz
934fb256bb [Orc][examples] Factor out make_error from parseExampleModule (NFC) 2021-03-26 18:49:07 +01:00
Stefan Gränitz
ecba2bfe16 [Orc][examples] Fix copy/paste issues in comments and inclue guards (NFC) 2021-03-26 18:49:07 +01:00
Nikita Popov
56b9e804f2 [ValueTracking] Handle non-zero shl recurrence
In this case we don't care about the step at all, and only require
that the starting value is non-zero.
2021-03-26 18:39:06 +01:00
Nikita Popov
07f0265381 [ValueTracking] Add tests for non-zero shl recurrences (NFC) 2021-03-26 18:35:38 +01:00
Nikita Popov
0926f8f2a9 [ValueTracking] Handle non-zero add/mul recurrences more precisely
This is mainly for clarity: It doesn't make sense to do any
negative/positive checks when dealing with a nuw add/mul. These
only make sense to nsw add/mul.
2021-03-26 18:30:07 +01:00
Nikita Popov
eb6c470c5f [ValueTracking] Add more non-zero add/mul recurrence tests (NFC) 2021-03-26 18:30:07 +01:00
Vaivaswatha Nagaraj
2e0c6019a3 [OCaml][DebugInfo][Test] Disable debuginfo tests as they fail on some machines 2021-03-26 22:56:38 +05:30
Simon Pilgrim
c49a846dbf [X86][AVX] combineHorizOpWithShuffle - improve SHUFFLE(HOP(LOSUBVECTOR(X),HISUBVECTOR(X))) folding
Peek through bitcasts to find subvector splits and use getTargetShuffleInputs to decode target shuffles as well as ShuffleVectorSDNode
2021-03-26 17:23:54 +00:00
Vaivaswatha Nagaraj
961e941c82 [OCaml][Test] Do not use Option, expand using match
Option seems to be unsupported on the buildbot version
of OCaml. So expand the statements using a match.

Fixes buildbot failure due to
c244cd7217
2021-03-26 22:41:29 +05:30
Florian Hahn
0e377c5502 [BasicAA] Add a few more interesting modulo tests. 2021-03-26 16:56:49 +00:00
Vaivaswatha Nagaraj
3a5a816a59 [OCaml][DebugInfo] Add tests for debug info API
In the process of adding the tests, several bugs were
found in the implementation and interface of the API
and they were fixed.

Some utilities from the core tests (core.ml) were moved
into a separate file for reuse.

The following new functions have been added:
`dibuild_create_global_variable_expression`,
`dibuild_create_constant_value_expression` and
`llmetadata_null`. The third one already existed but
is now exposed publicly.

Differential Revision: https://reviews.llvm.org/D99403
2021-03-26 22:06:48 +05:30
Aleksandr Platonov
64d851e46c [CMake][gRPC] Fix a typo in protobuf version variable name
Without this patch CMake log contains `Using protobuf` instead of `Using protobuf <version>`.

Reviewed By: kbobyrev

Differential Revision: https://reviews.llvm.org/D99405
2021-03-26 19:33:06 +03:00
Jay Foad
f21bfff407 [AMDGPU] Use reductions instead of scans in the atomic optimizer
If the result of an atomic operation is not used then it can be more
efficient to build a reduction across all lanes instead of a scan. Do
this for GFX10, where the permlanex16 instruction makes it viable. For
wave64 this saves a couple of dpp operations. For wave32 it saves one
readlane (which are generally bad for performance) and one dpp
operation.

Differential Revision: https://reviews.llvm.org/D98953
2021-03-26 15:38:14 +00:00
Florian Hahn
00978dd33d [BasicAA] Add a few cases with overflows in index computations.
This patch adds a few test cases where currently NoAlias is returned,
but the pointers can alias if the multiply overflows while computing
a GEP index value.
2021-03-26 14:50:03 +00:00
Sanjay Patel
3fade5f028 [SLP] move test for min/max crashing; NFC
This was originally just an XFAIL test, but I modified it
to check output. To make that bot-friendly, I'm moving it
to the x86 dir since it specified an x86 target.
2021-03-26 10:28:15 -04:00
Zakk Chen
bf5d542718 [RISCV] Add constraint for RVV indexed loads.
Add the constraint when destination EEW not equals the source EEW for
correctness.

The RVV spec has three register overlap rules and I implement the first
stricter constraint because the others are difficult to enforce.

Reviewed By: frasercrmck, craig.topper

Differential Revision: https://reviews.llvm.org/D98920
2021-03-26 07:23:24 -07:00
Sanjay Patel
c9f70d389b Revert "[SLP] allow matching integer min/max intrinsics as reduction ops"
This reverts commit 3c8473ba534daa3 and includes test diffs to
maintain testing status.

There's at least 1 place that was not updated with 7202f47508 ,
so we can crash mismatching select and intrinsics as shown in
PR49730.
2021-03-26 09:59:14 -04:00
Nashe Mncube
3ac25d30ac [InstCombine]Generalise regression tests for sve
The tests, test/Transforms/InstCombine/AArch64/sve-*,
have been shown to not be AArch64 specific. These tests
have been renamed and moved to reflect this.

Differential Revision: https://reviews.llvm.org/D99253
2021-03-26 12:04:50 +00:00
Josh Berdine
094815c89f [OCaml] Fix a possible crash in llvm_struct_name
The implementation of `llvm_struct_name` before this diff calls
`caml_copy_string`, which allocates, while the `result` local variable
points to a block allocated by `caml_alloc_small` that has not yet
been initialized. If the allocation in `caml_copy_string` triggers a
garbage collection, then the GC root `result` contains a pointer to
uninitialized data, which may crash the GC or lead to a memory
corruption.

This diff fixes this by allocating and initializing the string first
and then allocating and initializing the option, thereby leaving no
dangling pointers when allocations are made.

The conversion from a C string to an OCaml string option is refactored
into a function, `cstr_to_string_option`. This function is also used
to simplify the definitions of `llvm_get_mdstring` and
`llvm_string_of_const`.

Differential Revision: https://reviews.llvm.org/D99393
2021-03-26 11:49:13 +00:00
Josh Berdine
b6f24fdff2 [NFC][OCaml] Resolve const and unsigned compilation warnings
There are a number of compilation warnings regarding disregarding
const qualifiers, and casting between pointers to integer types with
different sign.

The incompatible sign warnings are due to treating the result of
`LLVMGetModuleIdentifier` as `const unsigned char *`, but it is
declared as `const char *`.

The dropped const qualifiers are due to the code pattern
`memcpy(String_val(_),_,_)` which ought to be (following the
implementation of the OCaml runtime)
`memcpy((char *)String_val(_),_,_)`. The issue is that `String_val` is
usually used to get the value of an immutable string. But in the
context of the `memcpy` calls, the string is in the process of being
initialized, so is not yet constant.

Differential Revision: https://reviews.llvm.org/D99392
2021-03-26 11:49:13 +00:00
Josh Berdine
511d90318d [NFC][OCaml] Simplify llvm_global_initializer using ptr_to_option
This diff uses ptr_to_option to convert a nullable C pointer to an
OCaml option instead of the redundant implementation in
llvm_global_initializer.

Differential Revision: https://reviews.llvm.org/D99391
2021-03-26 11:49:13 +00:00
David Sherwood
1622731c2d Revert "[LoopVectorize] Simplify scalar cost calculation in getInstructionCost"
This reverts commit 240aa96cf25d880dde7a0db5d96918cfaa4b8891.
2021-03-26 11:36:53 +00:00
David Sherwood
4e4f3dfb9b [LoopVectorize] Simplify scalar cost calculation in getInstructionCost
This patch simplifies the calculation of certain costs in
getInstructionCost when isScalarAfterVectorization() returns a true value.
There are a few places where we multiply a cost by a number N, i.e.

  unsigned N = isScalarAfterVectorization(I, VF) ? VF.getKnownMinValue() : 1;
  return N * TTI.getArithmeticInstrCost(...

After some investigation it seems that there are only these cases that occur
in practice:

1. VF is a scalar, in which case N = 1.
2. VF is a vector. We can only get here if: a) the instruction is a
GEP/bitcast with scalar uses, or b) this is an update to an induction variable
that remains scalar.

I have changed the code so that N is assumed to always be 1. For GEPs
the cost is always 0, since this is calculated later on as part of the
load/store cost. For all other cases I have added an assert that none of the
users needs scalarising, which didn't fire in any unit tests.

Only one test required fixing and I believe the original cost for the scalar
add instruction to have been wrong, since only one copy remains after
vectorisation.

Differential Revision: https://reviews.llvm.org/D98512
2021-03-26 11:27:12 +00:00
Abhina Sreeskantharajan
5e07382161 [Windows] Turn off text mode in TableGen and Rewriter to stop CRLF translation
This patch should fix the errors shown on the Windows bots by turning off text mode. I plan to investigate a better fix but this should unblock the buildbots for now.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D99363
2021-03-26 07:12:46 -04:00
Max Kazantsev
5df4846d00 [Test] Add failing test for pr49730 2021-03-26 18:03:39 +07:00
Jay Foad
3d5ba03831 [AMDGPU] Inline FSHRPattern into its only use. NFC. 2021-03-26 09:32:02 +00:00
Craig Topper
468c9f39ae [RISCV] Optimize (and (shl GPR:, uimm5:), 0xffffffff) to use 2 shifts instead of 3.
The and would normally become SLLI+SRLI, giving us 2 SLLI+SRLI. We
can detect this and combine the 2 SLLIs into 1.
2021-03-25 23:31:01 -07:00