1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 15:32:52 +01:00
Commit Graph

144 Commits

Author SHA1 Message Date
Nate Begeman
f9aac7846c Implement bitfield insert by recognizing the following pattern:
1. optional shift left
2. and x, immX
3. and y, immY
4. or z, x, y
==> rlwimi z, x, y, shift, mask begin, mask end

where immX == ~immY and immX is a run of set bits. This transformation
fires 32 times on voronoi, once on espresso, and probably several
dozen times on external benchmarks such as gcc.

To put this in terms of actual code generated for
struct B { unsigned a : 3; unsigned b : 2; };
void storeA (struct B *b, int v) { b->a = v;}
void storeB (struct B *b, int v) { b->b = v;}

Old:
_storeA:
        rlwinm r2, r4, 0, 29, 31
        lwz r4, 0(r3)
        rlwinm r4, r4, 0, 0, 28
        or r2, r4, r2
        stw r2, 0(r3)
        blr

_storeB:
        rlwinm r2, r4, 3, 0, 28
        rlwinm r2, r2, 0, 27, 28
        lwz r4, 0(r3)
        rlwinm r4, r4, 0, 29, 26
        or r2, r2, r4
        stw r2, 0(r3)
        blr

New:
_storeA:
        lwz r2, 0(r3)
        rlwimi r2, r4, 0, 29, 31
        stw r2, 0(r3)
        blr

_storeB:
        lwz r2, 0(r3)
        rlwimi r2, r4, 3, 27, 28
        stw r2, 0(r3)
        blr

llvm-svn: 17078
2004-10-17 05:19:20 +00:00
Nate Begeman
d4c970aa3d Finally fix one of the oldest FIXMEs in the PowerPC backend: correctly
flag rotate left word immediate then mask insert (rlwimi) as a two-address
instruction, and update the ISel usage of the instruction accordingly.

This will allow us to properly schedule rlwimi, and use it to efficiently
codegen bitfield operations.

llvm-svn: 17068
2004-10-16 20:43:38 +00:00
Chris Lattner
3662abfd5a ADd support for undef and unreachable
llvm-svn: 17050
2004-10-16 18:13:47 +00:00
Nate Begeman
d8183bd297 Better codegen of binary integer ops with 32 bit immediate operands.
This transformation fires a few dozen times across the testsuite.

For example, int test2(int X) { return X ^ 0x0FF00FF0; }
Old:
_test2:
        lis r2, 4080
        ori r2, r2, 4080
        xor r3, r3, r2
        blr

New:
_test2:
        xoris r3, r3, 4080
        xori r3, r3, 4080
        blr

llvm-svn: 17004
2004-10-15 00:50:19 +00:00
Nate Begeman
dfefd2f3fc Implement logical and with an immediate that consists of a contiguous block
of one or more 1 bits (may wrap from least significant bit to most
significant bit) as the rlwinm rather than andi., andis., or some longer
instructons sequence.

int andn4(int z) { return z & -4; }
int clearhi(int z) { return z & 0x0000FFFF; }
int clearlo(int z) { return z & 0xFFFF0000; }
int clearmid(int z) { return z & 0x00FFFF00; }
int clearwrap(int z) { return z & 0xFF0000FF; }

_andn4:
        rlwinm r3, r3, 0, 0, 29
        blr

_clearhi:
        rlwinm r3, r3, 0, 16, 31
        blr

_clearlo:
        rlwinm r3, r3, 0, 0, 15
        blr

_clearmid:
        rlwinm r3, r3, 0, 8, 23
        blr

_clearwrap:
        rlwinm r3, r3, 0, 24, 7
        blr

llvm-svn: 16832
2004-10-08 02:49:24 +00:00
Nate Begeman
370b1b7a9a Several fixes and enhancements to the PPC32 backend.
1. Fix an illegal argument to getClassB when deciding whether or not to
   sign extend a byte load.

2. Initial addition of isLoad and isStore flags to the instruction .td file
   for eventual use in a scheduler.

3. Rewrite of how constants are handled in emitSimpleBinaryOperation so
   that we can emit the PowerPC shifted immediate instructions far more
   often.  This allows us to emit the following code:

int foo(int x) { return x | 0x00F0000; }

_foo:
.LBB_foo_0:     ; entry
        ; IMPLICIT_DEF
        oris r3, r3, 15
        blr

llvm-svn: 16826
2004-10-07 22:30:03 +00:00
Chris Lattner
38fbf09104 Correct some typeos
llvm-svn: 16770
2004-10-06 16:28:24 +00:00
Nate Begeman
79d42a185e Turning on fsel code gen now that we can do so would be good.
llvm-svn: 16765
2004-10-06 11:03:30 +00:00
Nate Begeman
7b4fe83ba8 Implement floating point select for lt, gt, le, ge using the powerpc fsel
instruction.

Now, rather than emitting the following loop out of bisect:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f4
	bge .LBB_main_64	; no_exit.0.i
.LBB_main_63:	; no_exit.0.i
	b .LBB_main_65	; no_exit.0.i
.LBB_main_64:	; no_exit.0.i
	fmr f2, f1
.LBB_main_65:	; no_exit.0.i
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f5
	bge .LBB_main_67	; no_exit.0.i
.LBB_main_66:	; no_exit.0.i
	b .LBB_main_68	; no_exit.0.i
.LBB_main_67:	; no_exit.0.i
	fmr f4, f1
.LBB_main_68:	; no_exit.0.i
	fadd f1, f2, f4
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fcmpu cr0, f4, f0
	bgt .LBB_main_70	; no_exit.0.i
.LBB_main_69:	; no_exit.0.i
	b .LBB_main_71	; no_exit.0.i
.LBB_main_70:	; no_exit.0.i
	fmr f0, f4
.LBB_main_71:	; no_exit.0.i
	fsub f1, f2, f1
	addi r2, r2, -1
	fcmpu cr0, f1, f3
	blt .LBB_main_73	; no_exit.0.i
.LBB_main_72:	; no_exit.0.i
	b .LBB_main_74	; no_exit.0.i
.LBB_main_73:	; no_exit.0.i
	fmr f3, f1
.LBB_main_74:	; no_exit.0.i
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i

We emit this instead:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	fsel f1, f1, f1, f2
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f2, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f2
	fsel f2, f2, f2, f4
	fadd f1, f1, f2
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fsub f5, f0, f4
	fsel f0, f5, f0, f4
	fsub f1, f2, f1
	addi r2, r2, -1
	fsub f2, f1, f3
	fsel f3, f2, f3, f1
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i

llvm-svn: 16764
2004-10-06 09:53:04 +00:00
Nate Begeman
65376f660e Generate better code by being far less clever when it comes to the select instruction. Don't create overlapping register lifetimes
llvm-svn: 16580
2004-09-29 05:00:31 +00:00
Nate Begeman
a8b079e16a improve Type::BoolTy codegen by eliminating unnecessary clears and sign extends
llvm-svn: 16578
2004-09-29 03:45:33 +00:00
Nate Begeman
dc50ea0d82 To go along with sabre's improved InstCombining, improve recognition of
integers that we can use as immediate values in instructions.

Example from yacr2:
-       lis r10, -1
-       ori r10, r10, 65535
-       add r28, r28, r10
+       addi r28, r28, -1
        addi r7, r7, 1
        addi r9, r9, 1
        b .LBB_main_9   ; loopentry.1.i214

llvm-svn: 16566
2004-09-29 02:35:05 +00:00
Nate Begeman
921a44443d Correct some BuildMI arguments for the upcoming simple scheduler
llvm-svn: 16519
2004-09-27 05:08:17 +00:00
Nate Begeman
75f0d35dc6 Fix the last of the major PPC GEP folding deficiencies. This will allow
the ISel to use indexed and non-zero immediate offsets for GEPs that have
more than one use.  This is common for instruction sequences such as a load
followed by a modify and store to the same address.

llvm-svn: 16493
2004-09-23 05:31:33 +00:00
Nate Begeman
61d1797c03 add optimized code sequences for setcc x, 0
llvm-svn: 16478
2004-09-22 04:40:25 +00:00
Misha Brukman
6ad6dd2ab9 s/ISel/PPC32ISel/ to have unique class names for debugging via gdb because the
C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.

llvm-svn: 16470
2004-09-21 18:22:19 +00:00
Nate Begeman
e816600b3e All PPC instructions are now auto-printed
32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out

llvm-svn: 16163
2004-09-04 05:00:00 +00:00
Nate Begeman
3bad485eec Convert remaining X-Form and Pseudo instructions over to asm writer
llvm-svn: 16142
2004-09-02 08:13:00 +00:00
Reid Spencer
c4abcbefb1 Changes For Bug 352
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.

llvm-svn: 16137
2004-09-01 22:55:40 +00:00
Nate Begeman
923af3763d Implement the following missing functionality in the PPC backend:
cast fp->bool
cast ulong->fp
algebraic right shift long by non-constant value
These changes tested across most of the test suite.  Fixes Regression/casts

llvm-svn: 16081
2004-08-29 08:19:32 +00:00
Nate Begeman
0069f07741 Kill a majority of unnecessary sign extensions for byte loads
llvm-svn: 15991
2004-08-22 08:10:15 +00:00
Nate Begeman
e6aace2ecb Back out branchless SetCC code. While it helped a lot in some cases, it
hurt a lot in others.  Instead, improve branching version of SetCC and
Select instructions.  The old code will be in CVS should we ever need to
dig it up again.

llvm-svn: 15979
2004-08-21 20:42:14 +00:00
Nate Begeman
2f68d05d47 Implement code to convert SetCC into straight line code where appropriate. Add necessary instructions for this transformation to the .td file.
llvm-svn: 15952
2004-08-20 09:56:22 +00:00
Misha Brukman
21df6f6757 This PHI has 4 additional operands, not 2.
llvm-svn: 15926
2004-08-19 21:00:12 +00:00
Nate Begeman
0975cdde75 Convert casts that will have no effect into move instructions.
llvm-svn: 15914
2004-08-19 08:07:50 +00:00
Nate Begeman
81c97654da Clean up floating point instruction selection.
Change int->float cast code to put conversion constants in constant pool.
Shorten code sequence for constant pool fp loads.
Remove LOADLoDirect/LOADLoIndirect psuedo instructions and tweak asmwriter

llvm-svn: 15913
2004-08-19 05:20:54 +00:00
Nate Begeman
ca0ea7b9ba Re-fix hiding the Frame Pointer from the register allocator in functions
that have a frame pointer.  This change fixes Burg.  In addition, make
the necessary changes to floating point code gen and constant loading after
Chris Lattner's fixes to the asm writer.  These changes fix MallocBench/gs

llvm-svn: 15873
2004-08-17 07:17:44 +00:00
Misha Brukman
6ce030bf87 PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC*
llvm-svn: 15850
2004-08-17 04:55:41 +00:00
Nate Begeman
8cb25bf089 Fix mismatched adjust down/up of SP in functions that contain variable
sized allocas.

llvm-svn: 15806
2004-08-16 01:50:22 +00:00
Nate Begeman
2751f754b5 Fix float to int codepath by always allocating 8 bytes for the target of a double store; optimize cmplwi generation.
llvm-svn: 15759
2004-08-15 06:42:28 +00:00
Nate Begeman
03781a00e8 Fix handling of FP constants with single precision, and loading of internal linkage function addresses
llvm-svn: 15742
2004-08-14 22:11:38 +00:00
Nate Begeman
101112a2f4 Fix siod by switching BoolTy to byte rather than int until CFE changes for
Darwin.  Also, change asm printer to output proper stubs for external
functions whose address is passed as an argument to aid in bugpointing.

llvm-svn: 15721
2004-08-13 09:32:01 +00:00
Nate Begeman
6cf8366e11 Fix 177.mesa compilation, don't use floating point regs for base addresses!
llvm-svn: 15720
2004-08-13 04:45:14 +00:00
Nate Begeman
9f8ad2f245 Fix llc crasher compiling siod by giving BuildMI the correct number of arguments
llvm-svn: 15719
2004-08-13 03:56:49 +00:00
Nate Begeman
6120e8f04f Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer.
llvm-svn: 15662
2004-08-11 07:40:04 +00:00
Chris Lattner
2903154b98 Fix a case where constantexprs could leak into the PPC isel.
llvm-svn: 15661
2004-08-11 07:34:50 +00:00
Nate Begeman
c07b78eaa2 Fix 255.vortex by using getClassB instead of getClass
llvm-svn: 15648
2004-08-11 03:30:55 +00:00
Misha Brukman
6713996576 Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit.
llvm-svn: 15634
2004-08-11 00:09:42 +00:00
Misha Brukman
3f79fbe93f Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets
llvm-svn: 15631
2004-08-10 22:47:03 +00:00
Nate Begeman
b74ee41754 Fix casts of float to unsigned long
Replace STDX (store 64 bit int indexed) with STFDX (store double indexed)
Fix latent bug in indexed load generation
Generate indexed loads and stores in many more cases

llvm-svn: 15626
2004-08-10 20:42:36 +00:00
Chris Lattner
bbf11b1e1d Changes commited for Nate Begeman:
Use a PowerPC specific prolog epilog inserter to control where spilled
callee save regs are placed on the stack.
Get rid of implicit return address stack slot, save return address reg
(LR) in appropriate slot
Improve code generated for functions that don't have calls or access
globals


Note from Chris: PowerPCPEI will eventually be eliminated, once the
functionality is merged into CodeGen/PrologEpilogInserter.cpp

llvm-svn: 15536
2004-08-06 06:58:50 +00:00
Misha Brukman
a8bcaec663 Simplify loading (un)signed constants to registers, patch by Nate Begeman.
llvm-svn: 15306
2004-07-28 19:13:49 +00:00
Misha Brukman
8c293deaad LI can only take signed values, so values > 32767 can only be loaded with ORI
llvm-svn: 15299
2004-07-28 00:56:04 +00:00
Misha Brukman
d7d501d518 Build COND_BRANCHes which may become long or short, decided by a later pass.
Patch by Nate Begeman.

llvm-svn: 15282
2004-07-27 18:35:23 +00:00
Misha Brukman
a3ac216fce Add IMPLICIT_DEF of LR for branch-and-link instrs (calls and global accesses)
llvm-svn: 15270
2004-07-27 17:13:58 +00:00
Misha Brukman
288289f9a7 * Rewrote casts
* Implemented GEP folding
* Dynamically output global address stuff once per function
* Fix casting fp<->short/byte

Patch contributed by Nate Begeman.

llvm-svn: 15237
2004-07-26 18:13:24 +00:00
Misha Brukman
c7291558eb Eliminate spurious empty space; make code easier to page through.
llvm-svn: 15146
2004-07-23 22:35:49 +00:00
Misha Brukman
a899694208 Implement casting a floating point to 32-bit unsigned value
llvm-svn: 15143
2004-07-23 20:32:59 +00:00
Misha Brukman
ef73e28236 * Codegen of GEPs dramatically improved by folding multiplies and adds
* Function pointers implemented correctly using appropriate stubs

Contributed by Nate Begeman.

llvm-svn: 15133
2004-07-23 16:08:20 +00:00
Misha Brukman
3f338d98a6 * Change class of BoolTy back to cInt
* Fix indentation back to 2 spaces

llvm-svn: 15121
2004-07-23 01:11:19 +00:00
Misha Brukman
1109566c8d * Change bool from cInt to cByte (for now)
* Don't allow negative immediates to users of unsigned immediates
* Fix long compares
* Support <const int>, op as a potential immediate candidate
* Fix sign extension of short and byte loads
* Fix and improve integer casts
* Fix passing of doubles as vararg functions

Patch contributed by Nate Begeman.

llvm-svn: 15109
2004-07-22 15:58:04 +00:00
Misha Brukman
28e92a3fde * Add the lost fix to define the second reg of a 2-reg representation of longs
* Fix opcode RLWNM -> RLWINM since it uses an immediate const shift value

llvm-svn: 15087
2004-07-21 20:30:18 +00:00
Misha Brukman
9543849102 * Speed up canUseAsImmediateForOpcode() by comparing Operand before
dyn_cast<>ing and checking Constant's value
* Convert tabs to spaces

llvm-svn: 15086
2004-07-21 20:22:06 +00:00
Misha Brukman
64f203922d * Fix printing of signed immediate values
* Generation of opcodes that take 16 bit immediates
* Rewrote multiply to be correct for 64 bit values
* Rewrote all the long handling to be correct for PowerPC
* Fix visitSelectInst() to define the upper register of the pair of regs
  representing a long value

Patch contributed by Nate Begeman.

llvm-svn: 15083
2004-07-21 20:09:08 +00:00
Misha Brukman
6283677946 Treat external variables similarly to those with weak linkage: load indirect.
llvm-svn: 15047
2004-07-20 20:43:05 +00:00
Misha Brukman
fe769110a0 * Differentiate between global and weak symbol loads
* Fix functions that take more than 32 bytes of args
* Alignment of doubles in structs is 4 bytes, not 8
* Fix passing long args: rN = hi, rN+1 = lo
* Rewrite signed divide
* Rewrite Intrinsic::returnaddress

Patch courtesy of Nate Begeman.

llvm-svn: 15036
2004-07-20 15:51:37 +00:00
Misha Brukman
6baf9045f6 Move handing of GlobalValues from getReg() to copyConstantToRegister(), this
will avoid extra register-to-register copies.  Thanks to Chris for the idea.

llvm-svn: 15019
2004-07-20 00:59:38 +00:00
Misha Brukman
fdc633a29b * cFP class split into cFP32 and cFP64
* Fn args passed in registers are now recorded as used by the call instruction
`-> asm printer updated to not print out those registers with the call instr
* Stack frame layout in prolog/epilog fixed, spills and vararg fns now work
* float/double to signed int codegen now correct
* various single precision float codegen bugs fixed
* const integer multiply codegen fixed
* select and setcc blocks inserted into the correct place in machine CFG
* load of integer constant code optimized

All of Shootout tests now work.  Great thanks to Nate Begeman for the patch!

llvm-svn: 15014
2004-07-20 00:41:46 +00:00
Chris Lattner
8eb32809bc Fix infinite loop
llvm-svn: 14971
2004-07-18 18:45:01 +00:00
Chris Lattner
c62e642a1a CPR Fixes
llvm-svn: 14961
2004-07-18 07:29:35 +00:00
Misha Brukman
36bf6aa37c * Use LI(S) to copy constants into registers intead of ADDI(S) as the latter is
a funky way to "use" R0 for a 0-valued operand
* Add IMPLICIT_DEFs for incoming function arguments via registers to help the
  register allocator not clobber those registers
* Implement comparisons with longs
* Teach emitSelectOperation() to fold the SetCC operation

Patch contributed by Nate Begeman

llvm-svn: 14901
2004-07-16 21:06:24 +00:00
Chris Lattner
c4888ccda7 Patches towards fixing PR341
llvm-svn: 14841
2004-07-15 02:14:30 +00:00
Misha Brukman
d6a9646f29 Make sure MTSPR instruction is inserted into the BasicBlock
llvm-svn: 14822
2004-07-14 18:26:31 +00:00
Misha Brukman
0f42826f30 Don't define the same register twice when loading a ConstantPointerRef to a reg
llvm-svn: 14819
2004-07-14 17:57:04 +00:00
Misha Brukman
73d729838f * Fix multiplication by powers of two and otherwise
* Clarify variable name (StoreInst SI instead of LI)

llvm-svn: 14818
2004-07-14 15:29:51 +00:00
Misha Brukman
79b089abff * Specify that FP arith options have 3 operands
* Correctly load FP constants from the constant pool, should be refactored

llvm-svn: 14799
2004-07-13 15:35:45 +00:00
Misha Brukman
449715a57d Correctly load FP constants out of the constant pool.
llvm-svn: 14782
2004-07-12 23:49:47 +00:00
Chris Lattner
164659f141 Add compilability
llvm-svn: 14744
2004-07-11 02:48:28 +00:00
Misha Brukman
f8f753f04b * Add support for indexing into structures, thanks to Chris (x86)
The large diff is because of indentation of a whole region
* Fix querying predecessor blocks in SelectPHINodes(), thanks to Brian (v8)
* Add support for external functions malloc() and free()
* Fix some code indentation

Remember, kids: It's not plagiarism if you "creatively borrow" from your
sources.  It's called "research"!

llvm-svn: 14723
2004-07-09 15:45:07 +00:00
Misha Brukman
b83ace891d Add support for __fixdfdi(), __floatdisf(), and __floatdidf() external functions
llvm-svn: 14703
2004-07-08 19:41:16 +00:00
Misha Brukman
db4cddea8d * Use several Function* for external functions instead of a std::map
* Non-const FP values must be loaded into int regs (for vararg fns) via memory

llvm-svn: 14701
2004-07-08 18:27:59 +00:00
Misha Brukman
869f2b7219 * Add support for loading FP constants from the constant pool
* Load FP values into int regs as well for vararg functions; without memory ops!

llvm-svn: 14700
2004-07-08 18:02:38 +00:00
Misha Brukman
93b47cc963 * Use a map for caching lookups to external functions (fp div/rem)
* Tabs to spaces

llvm-svn: 14673
2004-07-07 20:07:22 +00:00
Misha Brukman
d5a439760c Add fmod() to the Module being compiled so that it gets a stub in the asm file
llvm-svn: 14670
2004-07-07 15:36:18 +00:00
Misha Brukman
ef78244e72 * Add support for calling vararg functions (must pass doubles in int regs too)
* Make visitSetCondInst() share condition-generating code with EmitComparison()
* There are 13 FPRs for function-passing arguments, not 8
* Do not rely on registers being sequential, use an array lookup
* In unimplemented switch cases, send an error and abort instead of silent
  fall-through
* Add doInitialization() for adding function prototypes for external math fns
* Minor changes: fix indentation, spacing, code clarity

llvm-svn: 14653
2004-07-06 22:51:53 +00:00
Misha Brukman
0b6de12a84 * Add utility functions: convert SetCC => PPC opcode and invert PPC opcode
* If SetCondInst is folded into BranchInst (and it is the only user), do not
  emit code for SetCondInst
* Fix assembly opcodes in comments in visitSetCondInst()
* Fix codegen of conditional branches

llvm-svn: 14643
2004-07-06 15:32:44 +00:00
Misha Brukman
f5deab6100 * Get rid of constant-expr handling code: we use the ConstantExpr lowering pass
* Use the SetCC handling code in the format of Brian's V8
* Add FIXMEs where calls to functions are being made without adding them to the
  Module first... they cause missing symbols at assembly-time.

llvm-svn: 14553
2004-07-01 21:34:10 +00:00
Misha Brukman
3422760e16 * Don't save LR when outputting globals: it's already saved on the stack once
for the function
* Registers aren't necessarily sequential wrt their enums, don't rely on it
  when emitting function arguments into sequential registers
* Remove X86-specific comments about AL/BL/AH/BH/EDX/etc
* Add an abort() for an unimplemented signed right shift
* The src operand for a GEP was never emitted!  Fixed.
* We can skip zero-valued GEP indices as they are no-ops.

"Hello, World!" now works.

llvm-svn: 14505
2004-06-29 23:45:05 +00:00
Misha Brukman
8f1e58dfe3 Fix loading and storing PC-relative static variables, courtesy of Nate Begeman.
llvm-svn: 14468
2004-06-28 18:20:59 +00:00
Misha Brukman
d903511cdf Do not move any values into registers for a void return (there isn't anything).
llvm-svn: 14413
2004-06-25 19:04:27 +00:00
Misha Brukman
8f9b970b80 Fix opcode: no immediate in an `or r1, r2, r3' (all registers) instr.
llvm-svn: 14411
2004-06-25 18:36:53 +00:00
Misha Brukman
fb9eb50899 Fix bug in previous checkin.
llvm-svn: 14405
2004-06-25 14:57:19 +00:00
Misha Brukman
4e610581b0 * Wrap long lines
* Replace silent fall-through FIXME comments with an error to cerr and an abort
* No need to set size of statically initialized arrays

llvm-svn: 14404
2004-06-25 14:50:41 +00:00
Misha Brukman
167dd03c82 Excise X86-specific comments.
llvm-svn: 14403
2004-06-25 14:13:26 +00:00
Misha Brukman
1d7c31b2c1 Add a `break' in the switch/case statement between the int/fp sections.
llvm-svn: 14385
2004-06-24 23:53:24 +00:00
Misha Brukman
2faa0989d0 Unindent some more code to be consistent.
llvm-svn: 14377
2004-06-24 22:00:15 +00:00
Misha Brukman
021bf53a50 Unindent some code, it only needs 2 spaces.
llvm-svn: 14376
2004-06-24 21:56:15 +00:00
Misha Brukman
ec698da314 In emitting code for a GEP instr, iterate over GEPTypes because there is one
more operand in GEPOps than there are types in GEPTypes: the pointer that is the
first operand of the GEP instruction.

llvm-svn: 14375
2004-06-24 21:54:47 +00:00
Misha Brukman
a79674d478 * Make indentation consistent at 2 chars
* Doxygenify function comments
* Wrap code at 80 cols

llvm-svn: 14295
2004-06-21 20:22:03 +00:00
Misha Brukman
3d93b9ccca llvm/IntrinsicLowering.h => llvm/CodeGen/IntrinsicLowering.h
llvm-svn: 14292
2004-06-21 18:30:31 +00:00
Misha Brukman
36089f7034 Intrinsic::isnan has gone away, support for it commented out.
Intrinsic::isunordered has arrived, and we just use the standard lowering
pass for it.

llvm-svn: 14290
2004-06-21 17:58:36 +00:00
Misha Brukman
1c26b2e29d Convert tabs to spaces.
llvm-svn: 14289
2004-06-21 17:41:12 +00:00
Misha Brukman
30e1885192 Type::getPrimitiveID() -> getTypeID()
llvm-svn: 14288
2004-06-21 17:25:55 +00:00
Misha Brukman
269034c151 Initial revision
llvm-svn: 14283
2004-06-21 16:55:25 +00:00