Tom Stellard
a529beed9c
R600: Use LDS and vectors for private memory
...
llvm-svn: 211110
2014-06-17 16:53:14 +00:00
Matt Arsenault
293918660a
R600/SI: Fix verifier error with pseudo store instructions.
...
Use i32 instead of specifying SReg_32. When this is
the pseudo INDIRECT_BASE_ADDR, this would give a bogus
verifier error.
llvm-svn: 207770
2014-05-01 16:37:52 +00:00
Matt Arsenault
f045301bf1
R600/SI: Print more immediates in hex format
...
Print in decimal for inline immediates, and hex otherwise. Use hex
always for offsets in addressing offsets.
This approximately matches what the shader compiler does.
llvm-svn: 206335
2014-04-15 22:32:49 +00:00
Tom Stellard
6b4e505e41
R600/SI: Use correct dest register class for V_READFIRSTLANE_B32
...
This instructions writes to an 32-bit SGPR. This change required adding
the 32-bit VCC_LO and VCC_HI registers, because the full VCC register
is 64 bits.
This fixes verifier errors on several of the indirect addressing piglit
tests.
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 204055
2014-03-17 17:03:51 +00:00
Tom Stellard
19af07fe92
R600: MOVA is vector only
...
llvm-svn: 199827
2014-01-22 19:24:24 +00:00
Tom Stellard
0971c460b5
R600: Take alignment into account when calculating the stack offset
...
llvm-svn: 199826
2014-01-22 19:24:23 +00:00
Tom Stellard
452996a15e
R600: Begin private memory at the second GPR.
...
This way private memory does not over-write work group information
stored in GPRs 0 and 1.
llvm-svn: 199824
2014-01-22 19:24:19 +00:00
Tom Stellard
369c33de20
R600/SI: Add support for i8 and i16 private loads/stores
...
llvm-svn: 199823
2014-01-22 19:24:14 +00:00
Benjamin Kramer
002aed9cb3
Fix broken CHECK lines.
...
llvm-svn: 199016
2014-01-11 21:06:00 +00:00
Tom Stellard
c38302be13
R600/SI: Add support for private address space load/store
...
Private address space is emulated using the register file with
MOVRELS and MOVRELD instructions.
llvm-svn: 194626
2013-11-13 23:36:50 +00:00
