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Commit Graph

146193 Commits

Author SHA1 Message Date
Gil Rapaport
95732c0a6d [LV] A unified scalarizeInstruction() for Vectorizer and Unroller; NFC
Unroller's specialized scalarizeInstruction() is mostly duplicating Vectorizer's
variant. OTOH Vectorizer's scalarizeInstruction() already supports the special
case of VF==1 except for avoiding mask-bit extraction in that case. This patch
removes Unroller's specialized version in favor of a unified method.

The only functional difference between the two variants seems to be setting
memcheck metadata for loads and stores only in Vectorizer's variant, which is a
bug in Unroller. To keep this patch an NFC the unified method doesn't set
memcheck metadata for VF==1.

Differential Revision: https://reviews.llvm.org/D30715

llvm-svn: 297580
2017-03-12 12:31:38 +00:00
Ayal Zaks
0f64e83c30 Test commit.
llvm-svn: 297579
2017-03-12 09:48:06 +00:00
Daniel Berlin
86a2b633e8 Split NewGVN class into a legacy pass and an impl, instead of a merged class.
llvm-svn: 297576
2017-03-12 04:46:45 +00:00
Daniel Berlin
6b099ded88 Add documentation on debug counters to Programmers Manual.
Reviewers: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30842

llvm-svn: 297575
2017-03-12 04:46:41 +00:00
Craig Topper
d9b7c494e1 [AVX-512] Fix a bad use of a high GR8 register after copying from a mask register during fast isel. This ends up extracting from bits 15:8 instead of the lower bits of the mask.
I'm pretty sure there are more problems lurking here. But I think this fixes PR32241.

I've added the test case from that bug and added asserts that will fail if we ever try to copy between high registers and mask registers again.

llvm-svn: 297574
2017-03-12 03:37:37 +00:00
Craig Topper
f0b4ec551c [AVX-512] Add test case for PR32241. Fix coming in another commit.
llvm-svn: 297573
2017-03-12 03:37:34 +00:00
Craig Topper
a2cff9a7f7 [AVX-512] Remove unused field in X86VectorVTInfo tablegen class.
llvm-svn: 297572
2017-03-12 03:37:32 +00:00
Simon Pilgrim
f9f8f12b3e [X86][SSE] Improve extraction of elements from v16i8 (pre-SSE41)
Without SSE41 (pextrb) we currently extract byte elements from a vector by spilling to stack and reloading the byte.

This patch is an initial attempt at using MOVD/PEXTRW to extract the relevant DWORD/WORD from the vector and then shift+truncate to collect the correct byte.

Extraction of multiple bytes this way would result in code bloat, but as explained in the patch we could probably afford to be more aggressive with the supported extractions before again falling back on spilling - possibly through counting the number of extracts and which DWORD/WORD they originate?

Differential Revision: https://reviews.llvm.org/D29841

llvm-svn: 297568
2017-03-11 20:42:31 +00:00
Simon Pilgrim
2f86d2b4b3 Remove unnecessary whitespace.
llvm-svn: 297567
2017-03-11 20:23:59 +00:00
Simon Pilgrim
1b64d965fb Fix signed/unsigned comparison warning
llvm-svn: 297565
2017-03-11 19:38:22 +00:00
Craig Topper
a947a144b0 [X86] Add avx2 gather tests cases that show a failure to remove zeroing of the source when the mask is all ones.
llvm-svn: 297564
2017-03-11 18:26:00 +00:00
Craig Topper
db9372c04c [X86] Remove unnecessary commented out code. NFC
llvm-svn: 297563
2017-03-11 18:25:56 +00:00
Simon Pilgrim
b8aa529569 Fix signed/unsigned comparison warnings
llvm-svn: 297561
2017-03-11 13:02:31 +00:00
Simon Pilgrim
070cebbdde Fix -Wsentinel warning
llvm-svn: 297560
2017-03-11 12:56:02 +00:00
Amaury Sechet
1085d274e8 Use setBits in SelectionDAG
Summary: As per title.

Reviewers: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30836

llvm-svn: 297559
2017-03-11 11:24:03 +00:00
Matt Arsenault
0ccffffd0a AMDGPU: Remove packf16 intrinsic
llvm-svn: 297557
2017-03-11 05:51:16 +00:00
Matt Arsenault
2e752c587f AMDGPU: Keep track of modifiers when converting v_mac to v_mad
Since v_max_f32_e64/v_max_f16_e64 can be folded if the target
instruction supports the clamp bit, we also need to maintain
modifiers when converting v_mac to v_mad.

This fixes a rendering issue with Dirt Rally because a v_mac
instruction with the clamp bit set was converted to a v_mad
but that bit was lost during the conversion.

Fixes: e184e01dd79 ("AMDGPU: Fold FP clamp as modifier bit")

Patch by Samuel Pitoiset <samuel.pitoiset@gmail.com>

llvm-svn: 297556
2017-03-11 05:40:40 +00:00
Kostya Serebryany
631b1c7fb6 [libFuzzer] add more iterations to LLVMFuzzer-Memcmp64BytesTest
llvm-svn: 297554
2017-03-11 05:14:49 +00:00
Zachary Turner
a5e44188b6 [ADT] Add a DenseMapInfo<T> for shorts.
Differential Revision: https://reviews.llvm.org/D30857

llvm-svn: 297552
2017-03-11 02:52:48 +00:00
Kostya Serebryany
537c4f4035 [libFuzzer] reduce the number of vector resizes during merge (https://github.com/google/oss-fuzz/issues/445)
llvm-svn: 297551
2017-03-11 02:50:47 +00:00
Zachary Turner
1b5e220eaa Fix line endings of DenseMapInfo.h
llvm-svn: 297550
2017-03-11 02:50:18 +00:00
Zachary Turner
fbab7c7505 Remove eol-style:native from DenseMapInfo.h
llvm-svn: 297549
2017-03-11 02:47:59 +00:00
Zachary Turner
b2ef21fc43 [Support] Add a formatv provider for Twine.
llvm-svn: 297548
2017-03-11 02:45:50 +00:00
Kostya Serebryany
4005067c57 [libFuzzer] print how much memory is consumed by the outer merge process (https://github.com/google/oss-fuzz/issues/445)
llvm-svn: 297546
2017-03-11 02:26:20 +00:00
Eric Fiselier
0d1cc3c255 Revert r297516 - Respect CMAKE_INSTALL_MANDIR for sphinx generated manpages
When CMAKE_INSTALL_MANDIR isn't defined it ends up attempting to install
the man pages under "/man1" and we really don't want to accidentally install
stuff at the filesystem root.

llvm-svn: 297545
2017-03-11 02:24:13 +00:00
Kostya Serebryany
e6fdbfa76f [libFuzzer] add test/LargeTest.cpp, mostly for manual experiments with large number of edges, not yet suitable for unit testing
llvm-svn: 297544
2017-03-11 01:54:06 +00:00
Kostya Serebryany
f08772cd99 [libFuzzer] remove fuzzer-jobs.test which is flaky and not very useful
llvm-svn: 297543
2017-03-11 01:48:54 +00:00
Daniel Berlin
4cf5f1bc63 Remove opt-bisect support for "cases" in favor of debug counters
Summary:
Ths "cases" support was not quite finished, is unused, and is really just debug counters.
(well, almost, debug counters are slightly more powerful, in that they can skip things at the start, too).
Note, opt-bisect itself could also be implemented as a wrapper around
debug counters, but not sure it's worth it ATM.

I'll shove it on a todo list if we think it is.

Reviewers: MatzeB, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30856

llvm-svn: 297542
2017-03-11 01:41:03 +00:00
Jordan Rose
d048e681fd [unittest] Explicitly specify alignment when using BumpPtrAllocator.
r297310 began inserting red zones around allocations under ASan, which
perturbs the alignment of subsequent allocations. Deliberately specify
this in two places where it matters.

Fixes failures when these tests are run under ASan and UBSan together.
Reviewed by Duncan Exon Smith.

rdar://problem/30980047

llvm-svn: 297540
2017-03-11 01:24:56 +00:00
Sanjoy Das
6088441f33 Use a WeakVH for UnknownInstructions in AliasSetTracker
Summary:
This change solves the same problem as D30726, except that this only
throws out the bathwater.

AST was not correctly tracking and deleting UnknownInstructions via
handles.  The existing code only tracks "pointers" in its
`ASTCallbackVH`, so an UnknownInstruction (that isn't also def'ing a
pointer used by another memory instruction) never gets a
`ASTCallbackVH`.

There are two other ways to solve this problem:

 - Use the `PointerRec` scheme for both known and unknown instructions.
 - Use a `CallbackVH` that erases the offending Instruction from the
   UnknownInstruction list.

Both of the above changes seemed to be significantly (and unnecessarily
IMO) more complex than this.

Reviewers: chandlerc, dberlin, hfinkel, reames

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D30849

llvm-svn: 297539
2017-03-11 01:15:48 +00:00
Daniel Berlin
57bd4bf4f0 VNCoercion: Make the function signatures all consistent
llvm-svn: 297537
2017-03-11 00:51:01 +00:00
Stanislav Mekhanoshin
3b7738cafe [AMDGPU] Remove getBidirectionalReasonRank
This method inverts the Reason field of a scheduling candidate.
It does right comparison between RegCritical and RegExcess, but
everything else is broken. In fact it can prefer less strong reason
such as Weak over RegCritical because Weak > -RegCritical.

The CandReason enum is properly sorted, so just remove artificial
ranking.

Differential Revision: https://reviews.llvm.org/D30557

llvm-svn: 297536
2017-03-11 00:29:27 +00:00
Quentin Colombet
6fa4a152f2 [IRTranslator] Simplify error handling for translating constants. NFC.
We don't need to check whether the fallback path is enabled to return
false. Just do that all the time on error cases, the caller knows (or
at least should know!) how to handle the failing case.

llvm-svn: 297535
2017-03-11 00:28:33 +00:00
Stanislav Mekhanoshin
1a7efa1920 Fix subreg value numbers in handleMoveUp
The problem can occur in presence of subregs. If we are swapping two
instructions defining different subregs of the same register we will
get a new liveout from a block. We need to preserve value number for
block's liveout for successor block's livein to match.

Differential Revision: https://reviews.llvm.org/D30558

llvm-svn: 297534
2017-03-11 00:14:52 +00:00
Simon Pilgrim
8cbbb0b0e9 Strip trailing whitespace.
llvm-svn: 297529
2017-03-10 22:53:19 +00:00
Simon Pilgrim
cb6e2d6ec5 Fix redundant condition (PR32138)
'!A || (A && B)' is equivalent to '!A || B'

llvm-svn: 297527
2017-03-10 22:44:47 +00:00
Krzysztof Parzyszek
e502bbc733 [RDF] Remove the map of reaching defs from copy propagation
Use Liveness::getNearestAliasedRef to find the reaching def instead.

llvm-svn: 297526
2017-03-10 22:44:24 +00:00
Krzysztof Parzyszek
1d6c1c1137 [RDF] Implement Liveness::getNearestAliasedRef(Reg, Inst)
This function will find the closest ref node aliased to Reg that is
in an instruction preceding Inst. This could be used to identify the
hypothetical reaching def of Reg, if Reg was a member of Inst.

llvm-svn: 297524
2017-03-10 22:42:17 +00:00
Simon Pilgrim
aa329ec2e1 [X86][SSE] Fix load folding for (V)CVTDQ2PD
This only requires a 64-bit memory source, not the whole 128-bits. But the 128-bit case is still supported via X86InstrInfo::foldMemoryOperandImpl

llvm-svn: 297523
2017-03-10 22:35:07 +00:00
Simon Pilgrim
d7bd16728a [X86] Fix Wunused-lambda-capture warning
llvm-svn: 297521
2017-03-10 22:10:34 +00:00
Simon Pilgrim
023dcf1715 [X86][RTM] Regenerate RTM intrinsic tests for 32/64-bit targets.
llvm-svn: 297518
2017-03-10 21:55:24 +00:00
Jonathan Roelofs
097d589869 Respect CMAKE_INSTALL_MANDIR for sphinx generated manpages
llvm-svn: 297516
2017-03-10 21:44:16 +00:00
Peter Collingbourne
1f89d06175 LTO: Hash type identifier resolutions for WholeProgramDevirt.
Differential Revision: https://reviews.llvm.org/D30555

llvm-svn: 297514
2017-03-10 21:37:10 +00:00
Peter Collingbourne
a48c2d285c LTO: Hash type identifier resolutions for LowerTypeTests.
Differential Revision: https://reviews.llvm.org/D30553

llvm-svn: 297513
2017-03-10 21:35:17 +00:00
Volkan Keles
590a208f60 [GlobalISel] LegalizerHelper: Lower (G_FSUB X, Y) to (G_FADD X, (G_FNEG Y))
Summary: No test case as none of the in-tree targets with GlobalISel support has this condition.

Reviewers: qcolombet, aditya_nandakumar, dsanders, t.p.northover, ab

Reviewed By: qcolombet

Subscribers: dberris, rovka, kristof.beyls, llvm-commits, igorb

Differential Revision: https://reviews.llvm.org/D30786

llvm-svn: 297512
2017-03-10 21:25:09 +00:00
Volkan Keles
30acd766e6 GlobalISel: Translate ConstantAggregateZero vectors
Reviewers: qcolombet, aditya_nandakumar, dsanders, ab, t.p.northover, javed.absar

Reviewed By: qcolombet

Subscribers: dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30259

llvm-svn: 297509
2017-03-10 21:23:13 +00:00
Eric Christopher
8df59291f2 Sink accessing TII to fix release Werror builds.
llvm-svn: 297507
2017-03-10 21:20:17 +00:00
Davide Italiano
8abb946c44 [ProfileSummaryInfo] Remove unneeded braces. NFCI.
llvm-svn: 297506
2017-03-10 20:50:51 +00:00
Daniel Berlin
4622ce726a Fix all these headers to properly mark the doxygen comments.
llvm-svn: 297505
2017-03-10 20:44:39 +00:00
Evandro Menezes
359cc5ef97 [AArch64, X86] Additional debug information for MacroFusion
In order to make it easier to parse information about the performance of
MacroFusion, this patch adds the function and the instruction names to the
debug output of this pass.

llvm-svn: 297504
2017-03-10 20:20:04 +00:00