Jim Grosbach
fff6ff502b
This FIXME has been fixed.
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llvm-svn: 127483
2011-03-11 20:07:37 +00:00
Jim Grosbach
2ecded3a94
Properly pseudo-ize ARM MVNCCi.
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llvm-svn: 127482
2011-03-11 19:55:55 +00:00
Jim Grosbach
39804c0b44
Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4).
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llvm-svn: 127469
2011-03-11 18:00:42 +00:00
Jim Grosbach
ed45ac390c
Properly pseudo-ize ARM MOVCCi and MOVCCi16.
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llvm-svn: 127442
2011-03-11 01:09:28 +00:00
Jim Grosbach
1986d9ac8f
Properly pseudo-ize MOVCCr and MOVCCs.
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llvm-svn: 127434
2011-03-10 23:56:09 +00:00
Jim Grosbach
5891b1323a
DMB can just be a pat referencing MCR.
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llvm-svn: 127423
2011-03-10 19:27:17 +00:00
Jim Grosbach
4b74ef6ca9
Reorganize a bit. No functional change, just moving patterns up.
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llvm-svn: 127422
2011-03-10 19:21:08 +00:00
Jim Grosbach
db549a7f6c
Pseudo-instructions are codegenonly by definition.
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llvm-svn: 127420
2011-03-10 19:06:39 +00:00
Johnny Chen
6bf5d7a170
LLVM combines the offset mode of A8.6.199 A1 & A2 into STRBT.
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The insufficient encoding information of the combined instruction confuses the decoder wrt
UQADD16. Add extra logic to recover from that.
Fixed an assert reported by Sean Callanan
llvm-svn: 127354
2011-03-09 20:01:14 +00:00
Bill Wendling
68934338ab
* Correct encoding for VSRI.
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* Add tests for VSRI and VSLI.
llvm-svn: 127297
2011-03-09 00:33:17 +00:00
Bill Wendling
b790c462c0
Correct the encoding for VRSRA and VSRA instructions.
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llvm-svn: 127294
2011-03-09 00:00:35 +00:00
Bill Wendling
ab9f04b6d8
* Fix VRSHR and VSHR to have the correct encoding for the immediate.
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* Update the NEON shift instruction test to expect what 'as' produces.
llvm-svn: 127293
2011-03-08 23:48:09 +00:00
Bob Wilson
f8c4d1ded9
Fix a compiler crash where a Glue value had multiple uses. Radar 9049552.
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llvm-svn: 127198
2011-03-08 01:17:20 +00:00
Bob Wilson
94403e6221
Fix comment typos.
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llvm-svn: 127197
2011-03-08 01:17:16 +00:00
Bill Wendling
958e854f40
Rename the narrow shift right immediate operands to "shr_imm*" operands. Also
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expand the testing of the narrowing shift right instructions.
No functionality change.
llvm-svn: 127193
2011-03-07 23:38:41 +00:00
Cameron Zwarich
a1920d7f51
Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo.
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llvm-svn: 127175
2011-03-07 21:56:36 +00:00
Anton Korobeynikov
8c7010e832
ARM assembler stuff is crazy: for .setfp positive values of offset corresponds to "add" instruction, not to "sub" as in .pad case
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llvm-svn: 127106
2011-03-05 18:44:00 +00:00
Anton Korobeynikov
f15e269356
In Thumb1 mode the constant might be materialized via the load from constpool. Emit unwinding information in case when this load from constpool is used to change the stack pointer in the prologue.
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llvm-svn: 127105
2011-03-05 18:43:55 +00:00
Anton Korobeynikov
d8873d31a8
Implement frame unwinding information emission for Thumb1. Not finished yet because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed.
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llvm-svn: 127104
2011-03-05 18:43:50 +00:00
Anton Korobeynikov
d4828b54ec
Add unwind information emission for thumb stuff
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llvm-svn: 127103
2011-03-05 18:43:43 +00:00
Anton Korobeynikov
7ba97c2831
Handle MI flags inside Thumb2SizeReduction pass.
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llvm-svn: 127102
2011-03-05 18:43:38 +00:00
Anton Korobeynikov
917ca94111
Preliminary support for ARM frame save directives emission via MI flags.
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This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.
llvm-svn: 127101
2011-03-05 18:43:32 +00:00
Anton Korobeynikov
62e48532b9
Some first rudimentary support for ARM EHABI: print exception table in "text mode".
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llvm-svn: 127099
2011-03-05 18:43:15 +00:00
Bob Wilson
1497601a7b
Remove unused conditional negate operations.
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llvm-svn: 127090
2011-03-05 16:54:31 +00:00
Devang Patel
23ee9fdba3
Disable ARMGlobalMerge on darwin. The debugger is not yet able to extract individual variable's info from merged global.
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llvm-svn: 127019
2011-03-04 19:11:05 +00:00
Bob Wilson
c48ba54186
PR8053: Fix encoding of S bit in some ARM instructions.
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Patch by Zonr Chang!
llvm-svn: 126967
2011-03-03 23:07:15 +00:00
Bob Wilson
72ccdfe148
Add a readme entry for the redundant movw issue for pr9370.
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llvm-svn: 126930
2011-03-03 06:39:09 +00:00
Bob Wilson
42f80596ca
pr9367: Add missing predicated BLX instructions.
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Patch by Jyun-Yan You, with some minor adjustments and a testcase from me.
llvm-svn: 126915
2011-03-03 01:41:01 +00:00
Kevin Enderby
58cc960338
Fixes an assertion failure while disassembling ARM rsbs reg/reg form.
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Patch by Ted Kremenek!
llvm-svn: 126895
2011-03-02 23:08:33 +00:00
Renato Golin
967b93c6e3
Fixing a bug when printing fpu text to object file. Patch by Mans Rullgard.
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llvm-svn: 126882
2011-03-02 21:20:09 +00:00
Bill Wendling
304dda7810
Narrow right shifts need to encode their immediates differently from a normal
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shift.
16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>
llvm-svn: 126723
2011-03-01 01:00:59 +00:00
Renato Golin
986151bc09
Fix .fpu printing in ARM assembly, regarding bug http://llvm.org/bugs/show_bug.cgi?id=8931
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llvm-svn: 126689
2011-02-28 22:04:27 +00:00
Kevin Enderby
da76779962
Add missing whitespace in the formatting.
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llvm-svn: 126687
2011-02-28 21:45:12 +00:00
Kevin Enderby
a1c2ea4ba0
Fix the arm's disassembler for blx that was building an MCInst without the
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needed two predicate operands before the imm operand.
llvm-svn: 126662
2011-02-28 18:46:31 +00:00
Evan Cheng
4e6d375744
Fix a typo which cause dag combine crash. rdar://9059537.
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llvm-svn: 126661
2011-02-28 18:45:27 +00:00
Stuart Hastings
539d4e1460
Support for byval parameters on ARM. Will be enabled by a forthcoming
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patch to the front-end. Radar 7662569.
llvm-svn: 126655
2011-02-28 17:17:53 +00:00
Bob Wilson
6bbffe19e9
Add patterns to use post-increment addressing for Neon VST1-lane instructions.
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llvm-svn: 126477
2011-02-25 06:42:42 +00:00
Evan Cheng
56354c17d9
Fix typo.
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llvm-svn: 126467
2011-02-25 01:29:29 +00:00
Evan Cheng
fbdcea4b2e
Each prologue may have multiple vpush instructions to store callee-saved
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D registers since the vpush list may not have gaps. Make sure the stack
adjustment instruction isn't moved between them. Ditto for vpop in
epilogues.
Sorry, can't reduce a small test case.
rdar://9043312
llvm-svn: 126457
2011-02-25 00:24:46 +00:00
Evan Cheng
98e040ea71
Change VFPNeonA8 definition to make the code easier to read.
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llvm-svn: 126298
2011-02-23 02:35:33 +00:00
Evan Cheng
da40bcab44
More fcopysign correctness and performance fix.
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The previous codegen for the slow path (when values are in VFP / NEON
registers) was incorrect if the source is NaN.
The new codegen uses NEON vbsl instruction to copy the sign bit. e.g.
vmov.i32 d1, #0x80000000
vbsl d1, d2, d0
If NEON is not available, it uses integer instructions to copy the sign bit.
rdar://9034702
llvm-svn: 126295
2011-02-23 02:24:55 +00:00
Evan Cheng
f540b0e0f6
VFP single precision arith instructions can go down to NEON pipeline, but on Cortex-A8 only.
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llvm-svn: 126238
2011-02-22 19:53:14 +00:00
Evan Cheng
f7c6f8580b
Guard against de-referencing MBB.end().
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llvm-svn: 126192
2011-02-22 07:07:59 +00:00
Evan Cheng
6e3d087477
available_externally (hidden or not) GVs are always accessed via stubs. rdar://9027648.
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llvm-svn: 126191
2011-02-22 06:58:34 +00:00
Eric Christopher
58b95654bc
Only use blx for external function calls on thumb, these could be fixed
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up by the dynamic linker, but it's better to use the correct instruction
to begin with.
Fixes rdar://9011034
llvm-svn: 126176
2011-02-22 01:37:10 +00:00
Evan Cheng
aaa5bd52f4
Skipping over debugvalue instructions to determine whether the split spot is in a IT block. rdar://9030770
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llvm-svn: 126159
2011-02-21 23:40:47 +00:00
Devang Patel
d5c4589795
Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
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In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working.
- The debugger needs to be aware of prolog_end attribute attached with line table entries.
- The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)
llvm-svn: 126155
2011-02-21 23:21:26 +00:00
Oscar Fuentes
59c8ae34f7
Use explicit add_subdirectory's for LLVM target sublibraries instead
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of testing for its presence at cmake time.
This way the build automatically regenerates the makefiles when a svn
update brings in a new sublibrary.
llvm-svn: 126068
2011-02-20 02:55:27 +00:00
Joerg Sonnenberger
4652f152e4
Avoid dangling else warnings.
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llvm-svn: 126004
2011-02-19 00:43:45 +00:00
Bruno Cardoso Lopes
d97e3e6dad
Fix style and a typo
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llvm-svn: 125949
2011-02-18 19:49:06 +00:00