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llvm-mirror/lib/CodeGen/SelectionDAG
Jonas Paulsson d21237cb11 [SelectionDAGBuilder] Bugfix in visitInlineAsm()
In case of a virtual register tied to a phys-def, the register class needs to
be computed. Make sure that this works generally also with fast regalloc by
using TLI.getRegClassFor() whenever possible, and make only the case of
'Untyped' use getMinimalPhysRegClass().

Fixes https://bugs.llvm.org/show_bug.cgi?id=51699.

Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D109291

(cherry picked from commit 118997d8e931dcb4c6e972611a7e4febcc33a061)
2021-09-08 14:03:50 -07:00
..
CMakeLists.txt
DAGCombiner.cpp [DAGCombine] Prevent the transform of combine for multi-use operand 2021-09-07 22:33:53 -07:00
FastISel.cpp [InstrRef][FastISel] Support emitting DBG_INSTR_REF from fast-isel 2021-07-16 13:56:15 +01:00
FunctionLoweringInfo.cpp [NFC] Wisely nest dyn_cast in FunctionLoweringInfo 2021-03-16 10:22:44 +01:00
InstrEmitter.cpp [DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations 2021-07-06 18:31:38 +01:00
InstrEmitter.h [DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations 2021-07-06 18:31:38 +01:00
LegalizeDAG.cpp [TargetLowering][AArch64][SVE] Take into account accessed type when clamping address 2021-06-30 13:30:18 +01:00
LegalizeFloatTypes.cpp Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00
LegalizeIntegerTypes.cpp [SelectionDAG] Fix miscompile bugs related to smul.fix.sat with scale zero 2021-08-31 20:59:28 -07:00
LegalizeTypes.cpp
LegalizeTypes.h [SelectionDAG][RISCV] Support @llvm.vscale.i64() on 32-bit targets. 2021-07-12 14:53:42 -07:00
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp [AArch64][SVE] Add support for fixed length MSCATTER/MGATHER 2021-07-01 12:13:59 +01:00
LegalizeVectorTypes.cpp [llvm] Add enum iteration to Sequence 2021-07-21 12:48:53 +00:00
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp [DebugInfo] Fix crash when emitting an invalidated SDDbgValue 2021-05-07 13:13:56 +01:00
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h [DAG] Ensure all SD classes consistently return a const reference with getDebugLoc(). NFCI. 2021-05-07 14:48:23 +01:00
SelectionDAG.cpp [SelectionDAG] Support scalable-vector splats in yet more cases 2021-07-26 10:15:08 +01:00
SelectionDAGAddressAnalysis.cpp
SelectionDAGBuilder.cpp [SelectionDAGBuilder] Bugfix in visitInlineAsm() 2021-09-08 14:03:50 -07:00
SelectionDAGBuilder.h SwiftTailCC: teach verifier musttail rules applicable to this CC. 2021-05-28 11:12:00 +01:00
SelectionDAGDumper.cpp [ISel] Port AArch64 SABD and UABD to DAGCombine 2021-06-26 19:34:16 +01:00
SelectionDAGISel.cpp [DebugInfo][InstrRef] Don't break up ret-sequences on debug-info instrs 2021-07-29 15:08:13 +01:00
SelectionDAGPrinter.cpp
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp [Statepoint Lowering] Cleanup: remove unused option statepoint-always-spill-base. 2021-05-18 12:15:15 +07:00
StatepointLowering.h More precisely type code used for gc.relocate assertions [nfc] 2021-04-06 11:27:36 -07:00
TargetLowering.cpp [SelectionDAG] Fix miscompile bugs related to smul.fix.sat with scale zero 2021-08-31 20:59:28 -07:00