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master3
llvm-mirror
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test
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llvm-mca
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X86
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Craig Topper
11c8ae2f75
[X86] Increase latency of port5 masked compares and kshift/kadd/kunpck instructions in SKX scheduler model
...
Uops.info shows these as 4 cycle latency.
2020-02-16 16:59:37 -08:00
..
Atom
Barcelona
BdVer2
Broadwell
[X86] Update the haswell and broadwell scheduler information for gather instructions
2020-02-03 17:57:48 -08:00
BtVer2
Generic
[X86] Add more avx512 instrutions to llvm-mca resource tests
2020-02-16 16:59:36 -08:00
Haswell
[X86] Update the haswell and broadwell scheduler information for gather instructions
2020-02-03 17:57:48 -08:00
SandyBridge
[X86] Fix missing load latencies (PR36894)
2020-02-05 11:53:16 +00:00
SkylakeClient
[X86] Raise the latency for VectorImul from 4 to 5 in Skylake scheduler models
2020-02-11 11:24:25 -08:00
SkylakeServer
[X86] Increase latency of port5 masked compares and kshift/kadd/kunpck instructions in SKX scheduler model
2020-02-16 16:59:37 -08:00
SLM
[X86] Fix missing load latencies (PR36894)
2020-02-04 18:18:29 +00:00
Znver1
Znver2
[X86][Sched] A bunch of fixes to the Zen2 sched model latencies.
2020-01-30 10:20:31 +01:00
bextr-read-after-ld.s
bzhi-read-after-ld.s
cpus.s
default-iterations.s
dispatch_width.s
fma3-read-after-ld-1.s
fma3-read-after-ld-2.s
in-order-cpu.s
intel-syntax.s
invalid-assembly-sequence.s
invalid-cpu.s
invalid-empty-file.s
lit.local.cfg
llvm-mca-markers-1.s
llvm-mca-markers-2.s
llvm-mca-markers-3.s
llvm-mca-markers-4.s
llvm-mca-markers-5.s
llvm-mca-markers-6.s
llvm-mca-markers-7.s
llvm-mca-markers-8.s
llvm-mca-markers-9.s
llvm-mca-markers-10.s
llvm-mca-markers-11.s
llvm-mca-markers-12.s
no-sched-model.s
option-all-stats-1.s
option-all-stats-2.s
option-all-views-1.s
option-all-views-2.s
option-no-stats-1.s
print-imm-hex-1.s
print-imm-hex-2.s
read-after-ld-1.s
read-after-ld-2.s
read-after-ld-3.s
register-file-statistics.s
scheduler-queue-usage.s
show-encoding.s
sqrt-rsqrt-rcp-memop.s
uop-queue.s
variable-blend-read-after-ld-1.s
variable-blend-read-after-ld-2.s