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Flag -show-encoding enables the printing of instruction encodings as part of the the instruction info view. Example (with flags -mtriple=x86_64-- -mcpu=btver2): Instruction Info: [1]: #uOps [2]: Latency [3]: RThroughput [4]: MayLoad [5]: MayStore [6]: HasSideEffects (U) [7]: Encoding Size [1] [2] [3] [4] [5] [6] [7] Encodings: Instructions: 1 2 1.00 4 c5 f0 59 d0 vmulps %xmm0, %xmm1, %xmm2 1 4 1.00 4 c5 eb 7c da vhaddps %xmm2, %xmm2, %xmm3 1 4 1.00 4 c5 e3 7c e3 vhaddps %xmm3, %xmm3, %xmm4 In this example, column Encoding Size is the size in bytes of the instruction encoding. Column Encodings reports the actual instruction encodings as byte sequences in hex (objdump style). The computation of encodings is done by a utility class named mca::CodeEmitter. In future, I plan to expose the CodeEmitter to the instruction builder, so that information about instruction encoding sizes can be used by the simulator. That would be a first step towards simulating the throughput from the decoders in the hardware frontend. Differential Revision: https://reviews.llvm.org/D65948 llvm-svn: 368432
78 lines
5.2 KiB
ArmAsm
78 lines
5.2 KiB
ArmAsm
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info < %s | FileCheck %s --check-prefix=NORMAL
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info -show-encoding=false < %s | FileCheck %s --check-prefix=NORMAL
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# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -all-views=false -instruction-info -show-encoding < %s | FileCheck %s --check-prefix=WITHENCODINGS
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movq 0x170(%rbp), %r10
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lea (%r8,%r8,2), %r9d
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movsx %r9d, %r9
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inc %r8d
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movq 0x178(%rbp), %r11
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vmovups (%r10,%r9,4), %xmm3
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vpslldq $0x4, %xmm3, %xmm2
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vpslldq $0x4, %xmm3, %xmm4
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vaddps %xmm2, %xmm3, %xmm6
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vpslldq $0xc, %xmm3, %xmm5
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vaddps %xmm4, %xmm5, %xmm7
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vaddps %xmm6, %xmm7, %xmm8
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vaddps %xmm8, %xmm0, %xmm9
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vshufps $0xff, %xmm9, %xmm9, %xmm0
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vmovups %xmm9, (%r11,%r9,4)
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cmp %r8d, %esi
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jl -90
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# NORMAL: Instruction Info:
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# NORMAL-NEXT: [1]: #uOps
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# NORMAL-NEXT: [2]: Latency
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# NORMAL-NEXT: [3]: RThroughput
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# NORMAL-NEXT: [4]: MayLoad
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# NORMAL-NEXT: [5]: MayStore
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# NORMAL-NEXT: [6]: HasSideEffects (U)
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# WITHENCODINGS: Instruction Info:
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# WITHENCODINGS-NEXT: [1]: #uOps
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# WITHENCODINGS-NEXT: [2]: Latency
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# WITHENCODINGS-NEXT: [3]: RThroughput
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# WITHENCODINGS-NEXT: [4]: MayLoad
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# WITHENCODINGS-NEXT: [5]: MayStore
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# WITHENCODINGS-NEXT: [6]: HasSideEffects (U)
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# WITHENCODINGS-NEXT: [7]: Encoding Size
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# NORMAL: [1] [2] [3] [4] [5] [6] Instructions:
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# NORMAL-NEXT: 1 3 1.00 * movq 368(%rbp), %r10
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# NORMAL-NEXT: 1 2 1.00 leal (%r8,%r8,2), %r9d
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# NORMAL-NEXT: 1 1 0.50 movslq %r9d, %r9
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# NORMAL-NEXT: 1 1 0.50 incl %r8d
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# NORMAL-NEXT: 1 3 1.00 * movq 376(%rbp), %r11
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# NORMAL-NEXT: 1 5 1.00 * vmovups (%r10,%r9,4), %xmm3
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# NORMAL-NEXT: 1 1 0.50 vpslldq $4, %xmm3, %xmm2
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# NORMAL-NEXT: 1 1 0.50 vpslldq $4, %xmm3, %xmm4
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# NORMAL-NEXT: 1 3 1.00 vaddps %xmm2, %xmm3, %xmm6
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# NORMAL-NEXT: 1 1 0.50 vpslldq $12, %xmm3, %xmm5
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# NORMAL-NEXT: 1 3 1.00 vaddps %xmm4, %xmm5, %xmm7
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# NORMAL-NEXT: 1 3 1.00 vaddps %xmm6, %xmm7, %xmm8
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# NORMAL-NEXT: 1 3 1.00 vaddps %xmm8, %xmm0, %xmm9
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# NORMAL-NEXT: 1 1 0.50 vshufps $255, %xmm9, %xmm9, %xmm0
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# NORMAL-NEXT: 1 1 1.00 * vmovups %xmm9, (%r11,%r9,4)
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# NORMAL-NEXT: 1 1 0.50 cmpl %r8d, %esi
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# NORMAL-NEXT: 1 1 0.50 jl -90
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# WITHENCODINGS: [1] [2] [3] [4] [5] [6] [7] Encodings: Instructions:
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# WITHENCODINGS-NEXT: 1 3 1.00 * 7 4c 8b 95 70 01 00 00 movq 368(%rbp), %r10
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# WITHENCODINGS-NEXT: 1 2 1.00 4 47 8d 0c 40 leal (%r8,%r8,2), %r9d
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# WITHENCODINGS-NEXT: 1 1 0.50 3 4d 63 c9 movslq %r9d, %r9
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# WITHENCODINGS-NEXT: 1 1 0.50 3 41 ff c0 incl %r8d
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# WITHENCODINGS-NEXT: 1 3 1.00 * 7 4c 8b 9d 78 01 00 00 movq 376(%rbp), %r11
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# WITHENCODINGS-NEXT: 1 5 1.00 * 6 c4 81 78 10 1c 8a vmovups (%r10,%r9,4), %xmm3
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# WITHENCODINGS-NEXT: 1 1 0.50 5 c5 e9 73 fb 04 vpslldq $4, %xmm3, %xmm2
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# WITHENCODINGS-NEXT: 1 1 0.50 5 c5 d9 73 fb 04 vpslldq $4, %xmm3, %xmm4
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# WITHENCODINGS-NEXT: 1 3 1.00 4 c5 e0 58 f2 vaddps %xmm2, %xmm3, %xmm6
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# WITHENCODINGS-NEXT: 1 1 0.50 5 c5 d1 73 fb 0c vpslldq $12, %xmm3, %xmm5
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# WITHENCODINGS-NEXT: 1 3 1.00 4 c5 d0 58 fc vaddps %xmm4, %xmm5, %xmm7
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# WITHENCODINGS-NEXT: 1 3 1.00 4 c5 40 58 c6 vaddps %xmm6, %xmm7, %xmm8
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# WITHENCODINGS-NEXT: 1 3 1.00 5 c4 41 78 58 c8 vaddps %xmm8, %xmm0, %xmm9
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# WITHENCODINGS-NEXT: 1 1 0.50 6 c4 c1 30 c6 c1 ff vshufps $255, %xmm9, %xmm9, %xmm0
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# WITHENCODINGS-NEXT: 1 1 1.00 * 6 c4 01 78 11 0c 8b vmovups %xmm9, (%r11,%r9,4)
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# WITHENCODINGS-NEXT: 1 1 0.50 3 44 39 c6 cmpl %r8d, %esi
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# WITHENCODINGS-NEXT: 1 1 0.50 6 0f 8c 00 00 00 00 jl -90
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