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AArch64
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This patch eanble register coalescing to coalesce the following:
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2015-07-23 19:24:53 +00:00 |
AMDGPU
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AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops
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2015-07-20 14:28:41 +00:00 |
ARM
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[ARM] Make the frame lowering code ready for shrink-wrapping.
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2015-07-22 16:34:37 +00:00 |
BPF
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[bpf] rename triple names bpf_be -> bpfeb
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2015-06-05 16:11:14 +00:00 |
CPP
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Generic
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Targets: commonize some stack realignment code
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2015-07-20 22:51:32 +00:00 |
Hexagon
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[Hexagon] Generate MUX from conditional transfers when dot-new not possible
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2015-07-20 21:23:25 +00:00 |
Inputs
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Mips
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[SDAG] Optimize unordered comparison in soft-float mode (patch by Anton Nadolskiy)
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2015-07-15 08:39:35 +00:00 |
MIR
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MIR Serialization: Serialize the '.cfi_offset' CFI instruction.
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2015-07-23 23:09:07 +00:00 |
MSP430
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NVPTX
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[BranchFolding] do not iterate the aliases of virtual registers
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2015-07-22 04:16:52 +00:00 |
PowerPC
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[PPC64LE] More vector swap optimization TLC
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2015-07-21 21:40:17 +00:00 |
SPARC
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[SPARC] Cleanup handling of the Y/ASR registers.
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2015-07-08 16:25:12 +00:00 |
SystemZ
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Thumb
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[ARM] Make the frame lowering code ready for shrink-wrapping.
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2015-07-22 16:34:37 +00:00 |
Thumb2
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ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2
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2015-07-21 00:18:59 +00:00 |
WebAssembly
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WebAssembly: test that valid -mcpu flags are accepted.
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2015-07-23 23:00:04 +00:00 |
WinEH
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[WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name
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2015-07-13 17:55:14 +00:00 |
X86
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fix crash in machine trace metrics due to processing dbg_value instructions (PR24199)
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2015-07-23 22:56:53 +00:00 |
XCore
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Move the personality function from LandingPadInst to Function
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2015-06-17 20:52:32 +00:00 |