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71647c0d9d
This is a follow-up to r325169, this time for all types, not just HVX vector types. Disable this by default, since it's not always safe. llvm-svn: 326915
24 lines
745 B
LLVM
24 lines
745 B
LLVM
; RUN: llc -march=hexagon -O0 -hexagon-align-loads=0 < %s | FileCheck %s
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; CHECK-LABEL: danny:
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; CHECK-DAG: [[T0:r[0-9]+]] = memuh(r0+#0)
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; CHECK-DAG: [[T1:r[0-9]+]] = memuh(r0+#2)
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; CHECK: [[T0]] |= asl([[T1]],#16)
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; CHECK-DAG: [[T2:r[0-9]+]] = memuh(r0+#4)
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; CHECK-DAG: [[T3:r[0-9]+]] = memuh(r0+#6)
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; CHECK: [[T2]] |= asl([[T3]],#16)
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; CHECK: combine([[T2]],[[T0]])
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define <4 x i16> @danny(<4 x i16>* %p) {
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%t0 = load <4 x i16>, <4 x i16>* %p, align 2
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ret <4 x i16> %t0
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}
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; CHECK-LABEL: sammy:
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; CHECK-DAG: [[T0:r[0-9]+]] = memw(r0+#0)
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; CHECK-DAG: [[T1:r[0-9]+]] = memw(r0+#4)
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; CHECK: combine([[T1]],[[T0]])
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define <4 x i16> @sammy(<4 x i16>* %p) {
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%t0 = load <4 x i16>, <4 x i16>* %p, align 4
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ret <4 x i16> %t0
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}
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