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030af396d9
llvm-mirror/test/CodeGen/Hexagon
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Krzysztof Parzyszek 030af396d9 [Hexagon] Subtarget feature to emit one instruction per packet 
This adds two features: "packets", and "nvj".

Enabling "packets" allows the compiler to generate instruction packets,
while disabling it will prevent it and disable all optimizations that
generate them. This feature is enabled by default on all subtargets.
The feature "nvj" allows the compiler to generate new-value jumps and it
implies "packets". It is enabled on all subtargets.

The exception is made for packets with endloop instructions, since they
require a certain minimum number of instructions in the packets to which
they apply. Disabling "packets" will not prevent hardware loops from
being generated.

llvm-svn: 327302
2018-03-12 17:47:46 +00:00
..
autohvx [Hexagon] Ignore indexed loads when handling unaligned loads 2018-03-08 18:15:13 +00:00
intrinsics [Hexagon] Fix operand-swapping PatFrag for atomic stores 2017-12-15 20:13:57 +00:00
loop-idiom [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
vect [Pipeliner] Fixed node order issue related to zero latency edges 2018-03-07 18:53:36 +00:00
absaddr-store.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
absimm.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
add_int_double.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
add_mpi_RRR.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
add-use.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
addaddi.ll [Hexagon] Add extra pattern for S4_addaddi 2017-10-23 19:07:50 +00:00
addasl-address.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
adde.ll [Hexagon] Propagate zext of i1 into arithmetic code in selection DAG 2017-03-09 16:29:30 +00:00
addh-sext-trunc.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
addh-shifted.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
addh.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
addr-calc-opt.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
addrmode-globoff.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
addrmode-indoff.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
addrmode-keepdeadphis.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
addrmode-keepdeadphis.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
addrmode-offset.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
addrmode-rr-to-io.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
addrmode.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
adjust-latency-stackST.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
aggr-antidep-tied.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
aggr-copy-order.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
aggr-licm.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
aggressive_licm.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
align_Os.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
align_test.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
alu64.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
always-ext.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
anti-dep-partial.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
args.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
ashift-left-right.ll
asr-rnd64.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
asr-rnd.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
assert-postinc-ptr-not-value.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
Atomics.ll
avoid-predspill-calleesaved.ll [Hexagon] Start using regmasks on calls 2017-02-17 22:14:51 +00:00
avoid-predspill.ll
avoidVectorLowering.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bank-conflict-load.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
barrier-flag.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
base-offset-addr.ll
base-offset-post.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
base-offset-stv4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bit-addr-align.mir [Hexagon] Fix alignment calculation of stack objects in Hexagon bit tracker 2018-02-20 14:29:43 +00:00
bit-bitsplit-at.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
bit-bitsplit-src.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
bit-bitsplit.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
bit-eval.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
bit-ext-sat.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
bit-extract-off.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
bit-extract.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
bit-extractu-half.ll
bit-gen-rseq.ll
bit-has.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
bit-loop-rc-mismatch.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
bit-loop.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
bit-phi.ll [Hexagon] Do not insert instructions before PHI nodes 2017-03-07 14:20:19 +00:00
bit-rie.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
bit-skip-byval.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
bit-validate-reg.ll [Hexagon] Generate extract instructions more aggressively 2017-02-28 23:27:33 +00:00
bit-visit-flowq.ll
bitconvert-vector.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
bitmanip.ll [Hexagon] Patterns for CTPOP, BSWAP and BITREVERSE 2017-02-23 15:02:09 +00:00
bkfir.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
block-addr.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
block-address.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
block-ranges-nodef.ll
blockaddr-fpic.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
branch-folder-hoist-kills.mir [CodeGen] Unify the syntax of MBB liveins in MIR and -debug output 2018-02-09 01:14:44 +00:00
branch-non-mbb.ll
branchfolder-insert-impdef.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
branchfolder-keep-impdef.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
BranchPredict.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
brcond-setne.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
brev_ld.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
brev_st.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
bss-local.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug6757-endloop.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug9049.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug9963.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug14859-iv-cleanup-lpad.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug14859-split-const-block-addr.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug15515-shuffle.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug17276.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug17386.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug18008.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug18491-optsize.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug19076.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug19119.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug19254-ifconv-vec.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug27085.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug31839.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug-aa4463-ifconv-vecpred.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug-allocframe-size.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bug-hcp-tied-kill.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
bugAsmHWloop.ll
build-vector-shuffle.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
build-vector-v4i8-zext.ll [Hexagon] Make sure to zero-extend bytes before building a vector 2017-11-28 19:13:17 +00:00
builtin-expect.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
builtin-prefetch-offset.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
builtin-prefetch.ll
call-long1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
call-ret-i1.ll [Hexagon] Return the correct chain edge for i1 function calls 2017-10-23 19:35:25 +00:00
call-v4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
calling-conv-2.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
calling-conv.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
callR_noreturn.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
callr-dep-edge.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
cext-check.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
cext-ice.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
cext-opt-basic.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cext-opt-numops.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cext-opt-range-assert.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cext-opt-range-offset.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cext-opt-shifted-range.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
cext-valid-packet1.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
cext-valid-packet2.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
cext.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
cexti16.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
cfgopt-fall-through.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
cfi_offset2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
cfi_offset.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
cfi-late-and-regpressure-init.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
cfi-late.ll
cfi-offset.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
check-dot-new.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
checktabs.ll
circ_ld.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
circ_ldd_bug.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
circ_ldw.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
circ_pcr_assert.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
circ_st.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
circ-load-isel.ll
clr_set_toggle.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
cmp_pred2.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
cmp_pred_reg.ll
cmp_pred.ll
cmp-extend.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
cmp-promote.ll
cmp-to-genreg.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
cmp-to-predreg.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
cmp.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
cmpb_gtu.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
cmpb_pred.ll
cmpb-dec-imm.ll [Hexagon] Add patterns for cmpb/cmph with immediate arguments 2017-10-13 15:43:12 +00:00
cmpb-eq.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
cmpbeq.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
cmph-gtu.ll [Hexagon] Add patterns for cmpb/cmph with immediate arguments 2017-10-13 15:43:12 +00:00
cmpy-round.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
coalesce_tfri.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
combine_ir.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
combine_lh.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
combine-imm-ext2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
combine-imm-ext.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
combine.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
combiner-lts.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
common-gep-basic.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
common-gep-icm.ll
common-gep-inbounds.ll [Hexagon] Run late copy propagation and dead code elimination passes 2018-01-24 17:48:11 +00:00
common-global-addr.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
compound.ll [Hexagon] Start using regmasks on calls 2017-02-17 22:14:51 +00:00
concat-vectors-legalize.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
const64.ll
const-combine.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
const-pool-tf.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
constext-call.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
constext-immstore.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
constext-replace.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
constp-andir-global.mir [Hexagon] Recognize non-immediate constants in HexagonConstPropagation 2018-02-23 20:33:26 +00:00
constp-clb.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
constp-combine-neg.ll [Hexagon] Implement buildVector32 and buildVector64 as utility functions 2017-11-22 20:56:23 +00:00
constp-ctb.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
constp-extract.ll
constp-physreg.ll
constp-rewrite-branches.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
constp-rseq.ll
constp-vsplat.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
convert_const_i1_to_i8.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
convert-to-dot-old.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
convertdptoint.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
convertdptoll.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
convertsptoint.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
convertsptoll.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
copy-to-combine-dbg.ll
count_0s.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
csr_stub_calls_dwarf_frame_info.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
csr-func-usedef.ll
csr-stubs-spill-threshold.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
ctor.ll
dadd.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
dag-combine-select-or0.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
dag-indexed.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
dccleana.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
dead-store-stack.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
dealloc_return.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
dealloc-store.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
debug-line_table_start.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
debug-prologue-loc.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
debug-prologue.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
def-undef-deps.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
default-align.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
deflate.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
dhry_proc8.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
dhry_stall.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
dhry.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
dmul.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
dont_rotate_pregs_at_O2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
double.ll
doubleconvert-ieee-rnd-near.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
dsub.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
dualstore.ll
duplex-addi-global-imm.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
duplex.ll [CodeGen] Always use printReg to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
dwarf-discriminator.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
early-if-conversion-bug1.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
early-if-debug.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
early-if-low8.mir [Hexagon] Handle *Low8 register classes in early if-conversion 2018-02-20 18:19:17 +00:00
early-if-merge-loop.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
early-if-phi-i1.ll [Hexagon] Add -march=hexagon to a testcase 2017-03-21 16:59:40 +00:00
early-if-spare.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
early-if-vecpi.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
early-if-vecpred.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
early-if.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
eh_return-r30.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
eh_return.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
eh_save_restore.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
ehabi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
eliminate-pred-spill.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
entryBB-isLoopHdr.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
expand-condsets-basic.ll
expand-condsets-copy-lis.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
expand-condsets-dead-bad.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
expand-condsets-dead-pred.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
expand-condsets-dead.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
expand-condsets-def-undef.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
expand-condsets-extend.ll
expand-condsets-imm.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
expand-condsets-impuse.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
expand-condsets-pred-undef2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
expand-condsets-pred-undef.ll
expand-condsets-rm-reg.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
expand-condsets-rm-segment.ll [Hexagon] Update more testcases 2018-03-06 19:15:58 +00:00
expand-condsets-same-inputs.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
expand-condsets-undef2.ll
expand-condsets-undef.ll
expand-condsets-undefvni.ll Missed a check for UndefVI in r306466 2017-06-28 15:46:16 +00:00
expand-condsets.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
expand-vselect-kill.ll [Hexagon] Run late copy propagation and dead code elimination passes 2018-01-24 17:48:11 +00:00
expand-vstorerw-undef2.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
expand-vstorerw-undef.ll [Hexagon] Allow construction of HVX vector predicates 2017-12-20 20:49:43 +00:00
extload-combine.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
extlow.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
extract_0bits.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
extract-basic.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
extractu_0bits.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
fadd.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
fcmp.ll
find-loop-instr.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
find-loop.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
fixed-spill-mutable.ll
float-amode.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
float-bitcast.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
float-const64-G0.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
float-gen-cmpop.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
float.ll
floatconvert-ieee-rnd-near.ll
fltnvjump.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
fmadd.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
fminmax.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
fmul.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
fpelim-basic.ll [Hexagon] Implement frame pointer elimination with -fomit-frame-pointer 2017-06-30 21:21:40 +00:00
frame-offset-overflow.ll [Pipeliner] Fixed node order issue related to zero latency edges 2018-03-07 18:53:36 +00:00
fsel.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
fsub.ll [Hexagon] Preclude non-memory test from being optimized away. NFC. 2017-07-05 13:08:03 +00:00
fusedandshift.ll [Hexagon] Generate extract instructions more aggressively 2017-02-28 23:27:33 +00:00
getBlockAddress.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
glob-align-volatile.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
global64bitbug.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
global-const-gep.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
global-ctor-pcrel.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
gp-plus-offset-load.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
gp-plus-offset-store.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
gp-rel.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
Halide_vec_cast_trunc1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
Halide_vec_cast_trunc2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hasfp-crash1.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
hasfp-crash2.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
hello-world-v55.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hello-world-v60.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hexagon_cfi_offset.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hexagon_vector_loop_carried_reuse_constant.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
hexagon_vector_loop_carried_reuse.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
hexagon-tfr-add.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hexagon-verify-implicit-use.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hidden-relocation.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
honor-optsize.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hrc-stack-coloring.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hvx-byte-store-double.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hvx-byte-store.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hvx-dbl-dual-output.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hvx-double-vzero.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hvx-dual-output.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hvx-loopidiom-memcpy.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hvx-nontemporal.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
hvx-vzero.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hwloop1.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
hwloop2.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
hwloop3.ll
hwloop4.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
hwloop5.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
hwloop-cleanup.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
hwloop-const.ll
hwloop-crit-edge.ll
hwloop-dbg.ll
hwloop-ice.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hwloop-le.ll
hwloop-long.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hwloop-loop1.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
hwloop-lt1.ll
hwloop-lt.ll
hwloop-missed.ll
hwloop-ne.ll
hwloop-noreturn-call.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
hwloop-ph-deadcode.ll
hwloop-phi-subreg.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hwloop-pos-ivbump1.ll
hwloop-preh.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
hwloop-preheader.ll
hwloop-range.ll
hwloop-recursion.ll
hwloop-redef-imm.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
hwloop-swap.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hwloop-with-return-call.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
hwloop-wrap2.ll
hwloop-wrap.ll
hx_V6_lo_hi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
i1_VarArg.ll
i8_VarArg.ll
i16_VarArg.ll
i128-bitop.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
idxload-with-zero-offset.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
ifcvt-common-kill.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
ifcvt-diamond-bad.ll
ifcvt-diamond-bug-2016-08-26.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
ifcvt-edge-weight.ll [CodeGen] Unify the syntax of MBB successors in MIR and -debug output 2018-02-09 00:10:31 +00:00
ifcvt-impuse-livein.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
ifcvt-live-subreg.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
ifcvt-simple-bprob.ll [IfConversion] Only renormalize probabilities if branches are analyzable 2017-03-06 19:12:42 +00:00
ignore-terminal-mbb.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
indirect-br.ll
initial-exec.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
inline-asm-a.ll [Hexagon] Add inline-asm constraint 'a' for modifier register class 2017-07-21 17:51:27 +00:00
inline-asm-bad-constraint.ll [Hexagon] Report error instead of crashing on wrong inline-asm constraints 2017-10-20 20:24:44 +00:00
inline-asm-clobber-lr.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
inline-asm-error.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
inline-asm-hexagon.ll
inline-asm-i1.ll
inline-asm-qv.ll [Hexagon] Remove trailing spaces, NFC 2017-11-22 20:43:00 +00:00
inline-asm-vecpred128.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
insert4.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
insert-basic.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
insert.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
integer_abs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
intrinsics-v60-alu.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
intrinsics-v60-misc.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
intrinsics-v60-permute.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
intrinsics-v60-shift.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
intrinsics-v60-vcmp.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
intrinsics-v60-vmpy-acc-128B.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
intrinsics-v60-vmpy-acc.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
intrinsics-v60-vmpy.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
invalid-dotnew-attempt.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
invalid-memrefs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
is-legal-void.ll
isel-combine-half.ll [Hexagon] Add patterns to select A2_combine_ll and its variants 2017-11-22 20:55:41 +00:00
isel-exti1.ll [Hexagon] Fix instruction selection for sign-extending i1 to i64 2017-02-28 22:37:01 +00:00
isel-global-offset-alignment.ll Revert: [Hexagon] Make sure that offset on globals matches alignment requirements 2018-01-30 18:10:27 +00:00
isel-i1arg-crash.ll [Hexagon] Fix lowering of formal arguments of type i1 2017-03-01 17:30:10 +00:00
isel-op-zext-i1.ll [Hexagon] Propagate zext of i1 into arithmetic code in selection DAG 2017-03-09 16:29:30 +00:00
isel-prefer.ll [Hexagon] Add patterns to select A2_combine_ll and its variants 2017-11-22 20:55:41 +00:00
isel-setcc-i1.ll [Hexagon] Add patterns for compares of i1 values 2018-02-27 18:31:46 +00:00
isel-simplify-crash.ll [Hexagon] Run late copy propagation and dead code elimination passes 2018-01-24 17:48:11 +00:00
isel-vacopy.ll [Hexagon] Handle VACOPY in isel lowering 2018-03-02 18:35:57 +00:00
jt-in-text.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
jump-table-g0.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
jump-table-isel.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
large-number-of-preds.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
lcomm.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
lit.local.cfg
livephysregs-add-pristines.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
livephysregs-lane-masks2.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
livephysregs-lane-masks.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
load-abs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
loadi1-G0.ll
loadi1-v4-G0.ll
loadi1-v4.ll
loadi1.ll
local-exec.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
long-calls.ll
loop_correctness.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
loop-prefetch.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
loop-rotate-bug.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
loop-rotate-liveins.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
lower-extract-subvector.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
lower-i1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
M4_mpyri_addi_global.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
M4_mpyrr_addi_global.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
machine-sink.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
macint.ll
maddsubu.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
mapped_intrinsics.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
maxd.ll
maxh.ll
maxud.ll
maxuw.ll
maxw.ll
mem-fi-add.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
mem-load-circ.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
mem-ops-sub_i16_01.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
mem-ops-sub.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
memcmp.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
memcpy-likely-aligned.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
memcpy-memmove-inline.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
memop-bit18.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
memops1.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
memops2.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
memops3.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
memops_global.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
memops-stack.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
memops.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
memset-inline.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
mind.ll
minu-zext-8.ll
minu-zext-16.ll
minud.ll
minuw.ll
minw.ll
mipi-double-small.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
misaligned_double_vector_store_not_fast.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
misaligned-access.ll
misched-top-rptracker-sync.ll
mpy.ll
mpysin-imm.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
mul64-sext.ll [Hexagon] Recognize more sign-extensions as inputs to 32x32-bit multiply 2018-02-27 22:44:41 +00:00
mul64.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
mulh.ll [Hexagon] Remove trailing spaces, NFC 2017-11-22 20:43:00 +00:00
mulhs.ll
multi-cycle.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
mux-basic.ll
mux-kill1.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
mux-kill2.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
mux-kill3.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
mux-undef.ll [Hexagon] Skip mux generation when predicate register is undefined 2017-06-08 20:56:36 +00:00
muxii-crash.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
neg-op.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
newify-crash.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
newvaluejump2.ll [Hexagon] Remove trailing spaces, NFC 2017-11-22 20:43:00 +00:00
newvaluejump3.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
newvaluejump-c4.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
newvaluejump-float.mir [Hexagon] Don't form new-value jumps from floating-point instructions 2018-02-06 19:08:41 +00:00
newvaluejump-kill2.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
newvaluejump-kill.ll [Hexagon] Run late copy propagation and dead code elimination passes 2018-01-24 17:48:11 +00:00
newvaluejump-postinc.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
newvaluejump-solo.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
newvaluejump.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
newvalueSameReg.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
newvaluestore2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
newvaluestore.ll
no_struct_element.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
no-falign-function-for-size.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
no-packets-gather.ll [Hexagon] Subtarget feature to emit one instruction per packet 2018-03-12 17:47:46 +00:00
no-packets.ll [Hexagon] Subtarget feature to emit one instruction per packet 2018-03-12 17:47:46 +00:00
noFalignAfterCallAtO2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
noreturn-noepilog.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
noreturn-notail.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
not-op.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
ntstbit.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
nv_store_vec.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
NVJumpCmp.ll
opt-addr-mode-subreg-use.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
opt-addr-mode.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
opt-fabs.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
opt-fneg.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
opt-glob-addrs-000.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
opt-glob-addrs-001.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
opt-glob-addrs-003.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
opt-sext-intrinsics.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
opt-spill-volatile.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
P08214.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
packed-store.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
packetize_cond_inst.ll
packetize-allocframe.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
packetize-call-r29.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
packetize-cfi-location.ll
packetize-impdef-1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
packetize-impdef.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
packetize-l2fetch.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
packetize-load-store-aliasing.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
packetize-nvj-no-prune.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
packetize-return-arg.ll
packetize-tailcall-arg.ll
packetize-volatiles.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
peephole-kill-flags.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
peephole-move-phi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
peephole-op-swap.ll
phi-elim.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
pic-jt-big.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
pic-jumptables.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
pic-local.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
pic-regusage.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
pic-simple.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
pic-static.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
plt-rel.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
pmpyw_acc.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
post-inc-aa-metadata.ll [CodeGen] Don't omit any redundant information in -debug output 2018-02-26 15:23:42 +00:00
post-ra-kill-update.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
postinc-aggr-dag-cycle.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
postinc-baseoffset.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
postinc-load.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
postinc-offset.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
postinc-store.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
PR33749.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
pred-absolute-store.ll [Hexagon] Return true in enableMultipleCopyHints(). 2018-02-21 16:37:45 +00:00
pred-gp.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
pred-instrs.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
pred-sched.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
pred-simp.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
pred-taken-jump.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
predicate-copy.ll
predicate-logical.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
predicate-rcmp.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
predtfrs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
prefetch-intr.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
prefetch-shuffler-ice.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
prob-types.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
propagate-vcombine.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
ps_call_nr.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
rdf-copy-renamable-reserved.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
rdf-copy-undef2.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
rdf-copy-undef.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
rdf-copy.ll [Hexagon] Remove trailing spaces, NFC 2017-11-22 20:43:00 +00:00
rdf-cover-use.ll [RDF] Remove covered parts of reached uses for phi and use in same block 2017-05-05 22:10:32 +00:00
rdf-dead-loop.ll
rdf-def-mask.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
rdf-ehlabel-live.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
rdf-extra-livein.ll
rdf-filter-defs.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
rdf-ignore-undef.ll
rdf-inline-asm-fixed.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
rdf-inline-asm.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
rdf-kill-last-op.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
rdf-multiple-phis-up.ll
rdf-phi-shadows.ll
rdf-phi-up.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
rdf-reset-kills.ll
readcyclecounter.ll [Hexagon] Implement @llvm.readcyclecounter() 2017-02-22 22:28:47 +00:00
redundant-branching2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
reg_seq.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
reg-eq-cmp.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
reg-scav-imp-use-dbl-vec.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
reg-scavengebug-2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
reg-scavengebug-3.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
reg-scavengebug-4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
reg-scavengebug-5.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
reg-scavengebug.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
reg-scavenger-valid-slot.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
regalloc-bad-undef.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
regalloc-block-overlap.ll [Hexagon] Run late copy propagation and dead code elimination passes 2018-01-24 17:48:11 +00:00
regalloc-liveout-undef.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
registerscav-missing-spill-slot.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
registerscavenger-fail1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
regp-underflow.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
regscav-wrong-super-sub-regs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
regscavenger_fail_hwloop.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
regscavengerbug.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
relax.ll
remove_lsr.ll
remove-endloop.ll
restore-single-reg.ll
ret-struct-by-val.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
rotl-i64.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
runtime-stkchk.ll Add address space mangling to lifetime intrinsics 2017-04-10 20:18:21 +00:00
save-kill-csr.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
save-regs-thresh.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
sdata-array.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
sdata-basic.ll
sdata-expand-const.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
sdata-opaque-type.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
sdata-stack-guard.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
sdr-basic.ll
sdr-shr32.ll
section_7275.ll [Hexagon] Adding gp+ to the syntax of gp-relative instructions 2017-02-06 23:18:57 +00:00
select-instr-align.ll [Hexagon] Rewrite non-HVX unaligned loads as pairs of aligned ones 2018-03-07 17:27:18 +00:00
setmemrefs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
sf-min-max.ll
sffms.ll
sfmin_dce.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
sfmpyacc_scale.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
shrink-frame-basic.ll
signed_immediates.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
simple_addend.ll
simpletailcall.ll
split-const32-const64.ll [Hexagon] Remove trailing spaces, NFC 2017-11-22 20:43:00 +00:00
split-vecpred.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
stack-align1.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
stack-align2.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
stack-align-reset.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
stack-alloca1.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
stack-alloca2.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
stack-guard-acceptable-type.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
static.ll [Hexagon] Adding gp+ to the syntax of gp-relative instructions 2017-02-06 23:18:57 +00:00
store1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store_abs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store-abs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store-AbsSet.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store-constant.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store-imm-amode.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
store-imm-byte.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store-imm-halword.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store-imm-large-stack.ll [Hexagon] Recognize potential offset overflow for store-imm to stack 2017-06-22 14:11:23 +00:00
store-imm-stack-object.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
store-imm-word.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store-shift.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
store-widen-aliased-load.ll
store-widen-negv2.ll
store-widen-negv.ll
store-widen-subreg.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
store-widen.ll
storerd-io-over-rr.ll
storerinewabs.ll
struct_args_large.ll
struct_args.ll
struct_copy_sched_r16.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
struct_copy.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
struct-const.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
sub-add.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
sube.ll [Hexagon] Propagate zext of i1 into arithmetic code in selection DAG 2017-03-09 16:29:30 +00:00
subh-shifted.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
subh.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
subi-asl.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
SUnit-boundary-prob.ll [Pipeliner] Fixed node order issue related to zero latency edges 2018-03-07 18:53:36 +00:00
switch-lut-explicit-section.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
switch-lut-function-section.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
switch-lut-multiple-functions.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
switch-lut-text-section.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
swiz.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-badorder.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-chain-refs.ll [Hexagon] Add REQUIRES: asserts to testcases that use -stats 2018-03-12 15:20:36 +00:00
swp-change-dep-cycle.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-change-dep.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-const-tc2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-const-tc3.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-const-tc.ll [LSR / TTI / SystemZ] Eliminate TargetTransformInfo::isFoldableMemAccess() 2017-08-09 11:28:01 +00:00
swp-cse-phi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-dag-phi1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-dag-phi.ll
swp-dead-regseq.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-disable-Os.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-epilog-phi4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-epilog-phi5.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-epilog-phi6.ll [Hexagon] Add REQUIRES: asserts to testcases that use -debug-only 2018-03-12 15:11:16 +00:00
swp-epilog-phi8.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-epilog-phi10.ll Fix two bugs in the pipeliner in renaming phis in the prolog and epilog 2016-12-22 18:49:55 +00:00
swp-epilog-phis.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-epilog-reuse2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-epilog-reuse3.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-epilog-reuse4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-epilog-reuse-1.ll [NFC] fix trivial typos in comments 2018-01-24 05:04:35 +00:00
swp-epilog-reuse.ll
swp-exit-fixup.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-fix-last-use1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-fix-last-use.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-intreglow8.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-kernel-last-use.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-kernel-phi1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-large-rec.ll [Hexagon] Add REQUIRES: asserts to testcases that use -stats 2018-03-12 15:20:36 +00:00
swp-loop-carried-crash.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-loop-carried.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-loopval.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-lots-deps.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-matmul-bitext.ll [Hexagon] Use automatically-generated scheduling information for HVX 2017-05-03 20:10:36 +00:00
swp-max.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
swp-maxstart.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-more-phi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-multi-loops.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
swp-multi-phi-refs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-new-phi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-node-order.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-order1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-order-carried.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-order-copies.ll [Pipeliner] Improve serialization order for post-increments 2017-10-11 15:51:44 +00:00
swp-order-deps1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-order-deps3.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-order-deps4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-order-deps6.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-order-prec.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-order.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-phi-chains.ll [Hexagon] Add REQUIRES: asserts to testcases that use -debug-only 2018-03-12 15:11:16 +00:00
swp-phi-def-use.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-phi-dep1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-phi-dep.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-phi-order.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-phi-ref1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-phi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-physreg.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-prolog-phi4.ll Fix two bugs in the pipeliner in renaming phis in the prolog and epilog 2016-12-22 18:49:55 +00:00
swp-prolog-phi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-regseq.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-remove-dep-ice.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-rename-dead-phi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-replace-uses1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-resmii.ll [Hexagon] Add REQUIRES: asserts to testcases that use -debug-only 2018-03-12 15:11:16 +00:00
swp-reuse-phi-1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-reuse-phi-2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-reuse-phi-4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-reuse-phi.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-stages3.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-stages4.ll [Pipeliner] Drop memrefs instead of creating ones with size UINT64_MAX 2018-02-27 22:40:52 +00:00
swp-stages5.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
swp-stages.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-subreg.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-swap.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-tfri.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
swp-vect-dotprod.ll
swp-vmult.ll [Pipeliner] Fixed node order issue related to zero latency edges 2018-03-07 18:53:36 +00:00
swp-vsum.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
tail-call-mem-intrinsics.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
tail-call-trunc.ll
tail-dup-subreg-abort.ll
tail-dup-subreg-map.ll [DAG] make binops with undef operands consistent with IR 2018-02-12 21:37:27 +00:00
tailcall_fastcc_ccc.ll
target-flag-ext.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
tcm-zext.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
testbits.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
tfr-mux-nvj.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
tfr-to-combine.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
tied_oper.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
tls_gd.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
tls_pic.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
tls_static.ll [Hexagon] Reorganize and update instruction patterns 2017-10-20 19:33:12 +00:00
trap-unreachable.ll [CodeGen] Add a -trap-unreachable option for debugging 2018-02-12 11:06:27 +00:00
trivialmemaliascheck.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
trunc-mpy.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
tstbit.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
two-crash.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
twoaddressbug.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
undef-ret.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
undo-dag-shift.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
union-1.ll
unordered-fcmp.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
unreachable-mbb-phi-subreg.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
upper-mpy.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
usr-ovf-dep.ll
v5_insns.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6-inlasm1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6-inlasm2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6-inlasm3.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6-inlasm4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6-shuffl.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6-spill1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6-unaligned-spill.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6-vecpred-copy.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vassignp.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vec_zero.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vec-vmemcur-prob.mir [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vec-vprint.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
v6vec-vshuff.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-dbl-fail1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-dbl-spill.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-dbl.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-dh1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-locals1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-no-sideeffects.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-pred2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-spill-kill.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-vmem1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v6vect-vsplat.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60_Q6_P_rol_PI.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60_sort16.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60-align.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60-cur.ll [Hexagon] Allow construction of HVX vector predicates 2017-12-20 20:49:43 +00:00
v60-haar-postinc.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60-halide-vcombinei8.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60-vec-128b-1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60-vecpred-spill.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60-vsel1.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
v60-vsel2.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60Intrins.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
v60rol-instrs.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v60small.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
v60Vasr.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
v62-CJAllSlots.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
v62-inlasm4.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
V60-VDblNew.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vadd1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vaddh.ll [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
validate-offset.ll
vararg-formal.ll [Hexagon] Fix lowering of formal arguments after r324737 2018-02-15 15:47:53 +00:00
varargs-memv.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vasrh.select.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vassign-to-combine.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
vcombine128_to_req_seq.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vcombine_subreg.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vcombine_to_req_seq.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vdmpy-halide-test.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
vec-align.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vec-call-full1.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vec-pred-spill1.ll [Hexagon] Remove {{ *}} from testcases 2018-03-06 19:07:21 +00:00
vec-vararg-align.ll [Hexagon] Express calling conventions via .td file instead of hand-coding 2018-02-09 15:30:02 +00:00
vecPred2Vec.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vect_setcc_v2i16.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vect_setcc.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vect-any_extend.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vect-dbl-post-inc.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vect-set_cc_v2i32.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vect-vd0.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vect-zero_extend.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vector-align.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
vector-ext-load.ll
verify-sink-code.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
verify-undef.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vextract-basic.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
vload-postinc-sel.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
vmemu-128.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vmpa-halide-test.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
vpack_eo.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
vrcmpys.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vselect-pseudo.ll [Hexagon] New HVX target features. 2017-10-18 18:07:07 +00:00
vsplat-ext.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
vsplat-isel.ll
wcsrtomb.ll [Hexagon] Add more lit tests 2018-03-12 14:01:28 +00:00
zextloadi1.ll [Hexagon] Minimize number of repeated constant extenders 2017-10-13 19:02:59 +00:00