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bf5a8236eb
Implement llvm.experimental.vector.{add,mul,or,and,...}.
An IR test is included but no C test for lack of good way to
get the compiler to emit these.
Differential Revision: https://reviews.llvm.org/D82920
69 lines
3.4 KiB
LLVM
69 lines
3.4 KiB
LLVM
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; RUN: opt < %s -msan-check-access-address=0 -msan-track-origins=1 -S -passes='module(msan-module),function(msan)' 2>&1 | \
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; RUN: FileCheck -allow-deprecated-dag-overlap -check-prefixes=CHECK,CHECK-ORIGINS %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare i32 @llvm.experimental.vector.reduce.add(<3 x i32>)
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declare i32 @llvm.experimental.vector.reduce.and(<3 x i32>)
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declare i32 @llvm.experimental.vector.reduce.or(<3 x i32>)
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; CHECK-LABEL: @reduce_add
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define i32 @reduce_add() sanitize_memory {
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; CHECK: [[P:%.*]] = inttoptr i64 0 to <3 x i32>*
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%p = inttoptr i64 0 to <3 x i32> *
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; CHECK: [[O:%.*]] = load <3 x i32>, <3 x i32>* [[P]]
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%o = load <3 x i32>, <3 x i32> *%p
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; CHECK: [[O_SHADOW:%.*]] = load <3 x i32>, <3 x i32>*
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; CHECK: [[O_ORIGIN:%.*]] = load i32, i32*
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; CHECK: [[R_SHADOW:%.*]] = call i32 @llvm.experimental.vector.reduce.or.v3i32(<3 x i32> [[O_SHADOW]])
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; CHECK: [[R:%.*]] = call i32 @llvm.experimental.vector.reduce.add.v3i32(<3 x i32> [[O]])
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%r = call i32 @llvm.experimental.vector.reduce.add(<3 x i32> %o)
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; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls
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; CHECK: store i32 [[O_ORIGIN]], {{.*}} @__msan_retval_origin_tls
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; CHECK: ret i32 [[R]]
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ret i32 %r
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}
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; CHECK-LABEL: @reduce_and
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define i32 @reduce_and() sanitize_memory {
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; CHECK: [[P:%.*]] = inttoptr i64 0 to <3 x i32>*
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%p = inttoptr i64 0 to <3 x i32> *
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; CHECK: [[O:%.*]] = load <3 x i32>, <3 x i32>* [[P]]
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%o = load <3 x i32>, <3 x i32> *%p
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; CHECK: [[O_SHADOW:%.*]] = load <3 x i32>, <3 x i32>*
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; CHECK: [[O_ORIGIN:%.*]] = load i32, i32*
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; CHECK: [[O_SHADOW_1:%.*]] = or <3 x i32> [[O]], [[O_SHADOW]]
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; CHECK: [[O_SHADOW_2:%.*]] = call i32 @llvm.experimental.vector.reduce.and.v3i32(<3 x i32> [[O_SHADOW_1]]
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; CHECK: [[O_SHADOW_3:%.*]] = call i32 @llvm.experimental.vector.reduce.or.v3i32(<3 x i32> [[O_SHADOW]])
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; CHECK: [[R_SHADOW:%.*]] = and i32 [[O_SHADOW_2]], [[O_SHADOW_3]]
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; CHECK: [[R:%.*]] = call i32 @llvm.experimental.vector.reduce.and.v3i32(<3 x i32> [[O]])
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%r = call i32 @llvm.experimental.vector.reduce.and(<3 x i32> %o)
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; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls
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; CHECK: store i32 [[O_ORIGIN]], {{.*}} @__msan_retval_origin_tls
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; CHECK: ret i32 [[R]]
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ret i32 %r
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}
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; CHECK-LABEL: @reduce_or
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define i32 @reduce_or() sanitize_memory {
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; CHECK: [[P:%.*]] = inttoptr i64 0 to <3 x i32>*
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%p = inttoptr i64 0 to <3 x i32> *
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; CHECK: [[O:%.*]] = load <3 x i32>, <3 x i32>* [[P]]
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%o = load <3 x i32>, <3 x i32> *%p
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; CHECK: [[O_SHADOW:%.*]] = load <3 x i32>, <3 x i32>*
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; CHECK: [[O_ORIGIN:%.*]] = load i32, i32*
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; CHECK: [[NOT_O:%.*]] = xor <3 x i32> [[O]], <i32 -1, i32 -1, i32 -1>
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; CHECK: [[O_SHADOW_1:%.*]] = or <3 x i32> [[NOT_O]], [[O_SHADOW]]
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; CHECK: [[O_SHADOW_2:%.*]] = call i32 @llvm.experimental.vector.reduce.and.v3i32(<3 x i32> [[O_SHADOW_1]]
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; CHECK: [[O_SHADOW_3:%.*]] = call i32 @llvm.experimental.vector.reduce.or.v3i32(<3 x i32> [[O_SHADOW]])
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; CHECK: [[R_SHADOW:%.*]] = and i32 [[O_SHADOW_2]], [[O_SHADOW_3]]
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; CHECK: [[R:%.*]] = call i32 @llvm.experimental.vector.reduce.or.v3i32(<3 x i32> [[O]])
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%r = call i32 @llvm.experimental.vector.reduce.or(<3 x i32> %o)
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; CHECK: store i32 [[R_SHADOW]], {{.*}} @__msan_retval_tls
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; CHECK: store i32 [[O_ORIGIN]], {{.*}} @__msan_retval_origin_tls
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; CHECK: ret i32 [[R]]
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ret i32 %r
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}
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