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llvm-mirror/test
Hal Finkel 04ae4c36c5 [PowerPC] Improve instruction selection bit-permuting operations (32-bit)
The PowerPC backend, somewhat embarrassingly, did not generate an
optimal-length sequence of instructions for a 32-bit bswap. While adding a
pattern for the bswap intrinsic to fix this would not have been terribly
difficult, doing so would not have addressed the real problem: we had been
generating poor code for many bit-permuting operations (by which I mean things
like byte-swap that permute the bits of one or more inputs around in various
ways). Here are some initial steps toward solving this deficiency.

Bit-permuting operations are represented, at the SDAG level, using ISD::ROTL,
SHL, SRL, AND and OR (mostly with constant second operands). Looking back
through these operations, we can build up a description of the bits in the
resulting value in terms of bits of one or more input values (and constant
zeros). For each bit, we compute the rotation amount from the original value,
and then group consecutive (value, rotation factor) bits into groups. Groups
sharing these attributes are then collected and sorted, and we can then
instruction select the entire permutation using a combination of masked
rotations (rlwinm), imm ands (andi/andis), and masked rotation inserts
(rlwimi).

The result is that instead of lowering an i32 bswap as:

	rlwinm 5, 3, 24, 16, 23
	rlwinm 4, 3, 24, 0, 7
	rlwimi 4, 3, 8, 8, 15
	rlwimi 5, 3, 8, 24, 31
	rlwimi 4, 5, 0, 16, 31

we now produce:

	rlwinm 4, 3, 8, 0, 31
	rlwimi 4, 3, 24, 16, 23
	rlwimi 4, 3, 24, 0, 7

and for the 'test6' example in the PowerPC/README.txt file:

 unsigned test6(unsigned x) {
   return ((x & 0x00FF0000) >> 16) | ((x & 0x000000FF) << 16);
 }

we used to produce:

	lis 4, 255
	rlwinm 3, 3, 16, 0, 31
	ori 4, 4, 255
	and 3, 3, 4

and now we produce:

	rlwinm 4, 3, 16, 24, 31
	rlwimi 4, 3, 16, 8, 15

and, as a nice bonus, this fixes the FIXME in
test/CodeGen/PowerPC/rlwimi-and.ll.

This commit does not include instruction-selection for i64 operations, those
will come later.

llvm-svn: 224318
2014-12-16 05:51:41 +00:00
..
Analysis IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Assembler IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Bindings IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Bitcode IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
BugPoint IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
CodeGen [PowerPC] Improve instruction selection bit-permuting operations (32-bit) 2014-12-16 05:51:41 +00:00
DebugInfo ARM/AArch64: Attach the FrameSetup MIFlag to CFI instructions. 2014-12-16 00:20:49 +00:00
ExecutionEngine Small model and JIT generally don't go well with each other. 2014-11-25 17:14:22 +00:00
Feature IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
FileCheck
Instrumentation IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Integer
JitListener IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Linker IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
LTO Lazily link GlobalVariables and GlobalAliases. 2014-12-08 18:45:16 +00:00
MC [Hexagon] Adding doubleword multiplies with and without accumulation. 2014-12-16 00:07:24 +00:00
Object Start adding thin archive support. 2014-12-16 01:43:41 +00:00
Other
SymbolRewriter
TableGen
tools Fix a bug in llvm-objdump’s -private-headers for 32-bit Mach-O files 2014-12-16 01:14:45 +00:00
Transforms Teach ScalarEvolution to exploit min and max expressions when proving 2014-12-15 22:50:15 +00:00
Unit
Verifier IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
YAMLParser
.clang-format
CMakeLists.txt Revert r224149, llvm-dsymutil was already here. 2014-12-12 21:25:07 +00:00
lit.cfg Initial dsymutil tool commit. 2014-12-12 17:31:24 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh