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llvm-mirror/test/CodeGen
Craig Topper 0558ecc62b [SelectionDAG] Add LegalTypes flag to getShiftAmountTy. Use it to unify and simplify DAGCombiner and simplifySetCC code and fix a bug.
DAGCombiner and SimplifySetCC both use getPointerTy for shift amounts pre-legalization. DAGCombiner uses a single helper function to hide this. SimplifySetCC does it in multiple places.

This patch adds a defaulted parameter to getShiftAmountTy that can make it return getPointerTy for scalar types. Use this parameter to simplify the SimplifySetCC and DAGCombiner.

Additionally, there were two places in SimplifySetCC that were creating shifts using the target's preferred shift amount pre-legalization. If the target uses a narrow type and the type is illegal, this can cause SimplfiySetCC to create a shift with an amount that can't represent all possible shift values for the type. To fix this we should use pointer type there too.

Alternatively we could make getScalarShiftAmountTy for each target return a safe value for large types as proposed in D43445. And maybe we should still do that, but fixing the SimplifySetCC code keeps other targets from tripping over this in the future.

Fixes PR36250.

Differential Revision: https://reviews.llvm.org/D43449

llvm-svn: 325602
2018-02-20 17:41:05 +00:00
..
AArch64 [AArch64][GlobalISel] When copying from a gpr32 to an fpr16 reg, convert to fpr32 first. 2018-02-20 05:11:57 +00:00
AMDGPU [AMDGPU] stop buffer_store being moved illegally 2018-02-20 10:03:38 +00:00
ARC
ARM [CodeGen] Fix tests breaking after r325505 2018-02-19 15:51:17 +00:00
AVR [CodeGen] Unify the syntax of MBB successors in MIR and -debug output 2018-02-09 00:10:31 +00:00
BPF [BPF] Return true in enableMultipleCopyHints(). 2018-02-18 10:09:54 +00:00
Generic Made test dbg_value_fastisel.ll specific to AArch64 fast-isel. 2018-02-17 17:43:24 +00:00
Hexagon [Hexagon] Fix alignment calculation of stack objects in Hexagon bit tracker 2018-02-20 14:29:43 +00:00
Inputs
Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
Mips Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
MIR [GISel]: Verify COPIES involving generic registers. 2018-02-09 01:27:23 +00:00
MSP430
Nios2
NVPTX [DAGCombiner] Call ExtendUsesToFormExtLoad in (zext (and (load)))->(and (zextload)) even when the and does not have multiple uses 2018-02-15 20:20:32 +00:00
PowerPC [PowerPC] Reduce stack frame for fastcc functions by only allocating parameter save area when needed 2018-02-20 15:09:45 +00:00
RISCV [RISCV] Revert r324172 now r323991 was reverted 2018-02-17 18:17:47 +00:00
SPARC Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
SystemZ Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
Thumb [ARM] Mark -1 as cheap in xor's for thumb1 2018-02-20 11:07:35 +00:00
Thumb2 [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
WebAssembly [WebAssembly] Add mechanisms for specifying an explicit import module name. 2018-02-09 23:13:22 +00:00
WinCFGuard
WinEH
X86 [SelectionDAG] Add LegalTypes flag to getShiftAmountTy. Use it to unify and simplify DAGCombiner and simplifySetCC code and fix a bug. 2018-02-20 17:41:05 +00:00
XCore Emit smaller exception tables for non-SJLJ mode. 2018-02-09 17:13:37 +00:00