Bradley Smith 0ce8c1944a [ARM64] Change SYS without a register to an alias to make disassembling more consistant. ... llvm-svn: 205898		2014-04-09 14:44:58 +00:00
..
advsimd.txt	[ARM64] Ensure sp is decoded as SP, not XZR in LD1 instructions.	2014-04-09 14:44:07 +00:00
arithmetic.txt	[ARM64] Flag setting logical/add/sub immediate instructions don't use SP.	2014-04-09 14:44:44 +00:00
basic-a64-undefined.txt	[ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0.	2014-04-09 14:43:35 +00:00
bitfield.txt
branch.txt
canonical-form.txt	[ARM64] SXTW/UXTW are only valid aliases for 32-bit operations.	2014-04-09 14:44:22 +00:00
crc32.txt
crypto.txt
invalid-logical.txt
lit.local.cfg
logical.txt	[ARM64] Flag setting logical/add/sub immediate instructions don't use SP.	2014-04-09 14:44:44 +00:00
memory.txt	[ARM64] Fix disassembly logic for extended loads/stores with 32-bit registers.	2014-04-09 14:44:36 +00:00
non-apple-fmov.txt	[ARM64] Properly support both apple and standard syntax for FMOV	2014-04-09 14:44:49 +00:00
scalar-fp.txt	[ARM64] Properly support both apple and standard syntax for FMOV	2014-04-09 14:44:49 +00:00
system.txt	[ARM64] Change SYS without a register to an alias to make disassembling more consistant.	2014-04-09 14:44:58 +00:00