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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
llvm-mirror/test/CodeGen
Michael Kuperstein 8c57546852 [DAG] Don't try to create an INSERT_SUBVECTOR with an illegal source
We currently can't legalize those, but we should really not be creating
them in the first place, since legalization would probably look similar to the
way we legalize CONCAT_VECTORS - basically replace the INSERT with a BUILD.

This fixes PR311956.

Differential Revision: https://reviews.llvm.org/D29961

llvm-svn: 295213
2017-02-15 18:37:26 +00:00
..
AArch64 GlobalISel: deal with new G_PTR_MASK instruction on AArch64. 2017-02-14 20:56:29 +00:00
AMDGPU [AMDGPU] Revert failed scheduling 2017-02-15 17:19:50 +00:00
ARM [BranchFolding] Tail common all identical unreachable blocks 2017-02-14 21:02:24 +00:00
AVR
BPF
Generic [AVR] XFAIL a set of failing CodeGen tests 2017-02-08 10:24:18 +00:00
Hexagon [Hexagon] Replace instruction definitions with auto-generated ones 2017-02-10 15:33:13 +00:00
Inputs
Lanai
Mips [LLVM][XRAY][MIPS] Support xray on mips/mipsel/mips64/mips64el 2017-02-15 10:48:11 +00:00
MIR MIR: parse & print the atomic parts of a MachineMemOperand. 2017-02-13 22:14:08 +00:00
MSP430
NVPTX
PowerPC Fix typo in test filename. NFC 2017-02-11 17:48:49 +00:00
SPARC
SystemZ
Thumb [Thumb-1] TBB generation: spot redefinitions of index register 2017-02-13 14:07:39 +00:00
Thumb2 [ARM] Use VCMP, not VCMPE, for floating point equality comparisons 2017-02-13 12:32:47 +00:00
WebAssembly
WinEH
X86 [DAG] Don't try to create an INSERT_SUBVECTOR with an illegal source 2017-02-15 18:37:26 +00:00
XCore Move some error handling down to MCStreamer. 2017-02-10 15:13:12 +00:00