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This patch adds a pipeline to support in-order CPUs such as ARM Cortex-A55. In-order pipeline implements a simplified version of Dispatch, Scheduler and Execute stages as a single stage. Entry and Retire stages are common for both in-order and out-of-order pipelines. Differential Revision: https://reviews.llvm.org/D94928 |
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HardwareUnit.cpp | ||
LSUnit.cpp | ||
RegisterFile.cpp | ||
ResourceManager.cpp | ||
RetireControlUnit.cpp | ||
Scheduler.cpp |