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f2c842c94a
Follow the same strategy used for atomic loads/stores by converting the operands to equally-sized integer types. This change prevents the atomic expansion pass from generating illegal LL/SC pairs when targeting AArch64: `expand-atomicrmw-xchg-fp.ll` would previously instantiate intrinsics such as `llvm.aarch64.ldaxr.p0f32` that cannot be lowered. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D103232 |
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AArch64 | ||
AMDGPU | ||
ARM | ||
Hexagon | ||
Mips | ||
RISCV | ||
SPARC | ||
X86 |