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45f41f7ab1
This is a more general alternative/extension to D102635. Rather than handling the special case of "header exit with non-exiting latch", this unrolls against the smallest exact trip count from any exit. The latch exit is no longer treated as priviledged when it comes to full unrolling. The motivating case is in full-unroll-one-unpredictable-exit.ll. Here the header exit is an IV-based exit, while the latch exit is a data comparison. This kind of loop does not get rotated, because the latch is already exiting, and loop rotation doesn't try to distinguish IV-based/analyzable latches. Differential Revision: https://reviews.llvm.org/D102982
220 lines
7.2 KiB
LLVM
220 lines
7.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -loop-unroll -S < %s | FileCheck %s
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declare void @bar()
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define void @test1() {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_1:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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; CHECK: latch.1:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_2:%.*]]
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; CHECK: latch.2:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_3:%.*]]
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; CHECK: latch.3:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_4:%.*]]
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; CHECK: latch.4:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_5:%.*]]
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; CHECK: latch.5:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_6:%.*]]
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; CHECK: latch.6:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_7:%.*]]
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; CHECK: latch.7:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_8:%.*]]
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; CHECK: latch.8:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_9:%.*]]
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; CHECK: latch.9:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br i1 false, label [[LATCH_10:%.*]], label [[EXIT:%.*]]
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; CHECK: latch.10:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[EXIT]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [0, %entry], [%iv.next, %latch]
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%iv.next = add i64 %iv, 1
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call void @bar()
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%cmp1 = icmp ult i64 %iv, 10
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br i1 %cmp1, label %latch, label %exit
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latch:
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call void @bar()
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%cmp2 = icmp ult i64 %iv, 20
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br i1 %cmp2, label %loop, label %exit
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exit:
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ret void
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}
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; Fully unroll this loop by 10, but leave the unrolled latch
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; tests since we don't know if %N < 10, and break the backedge.
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define void @test2(i64 %N) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br i1 true, label [[LOOP_1:%.*]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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; CHECK: loop.1:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_1:%.*]]
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; CHECK: latch.1:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_1:%.*]] = icmp ule i64 1, [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP2_1]], label [[LOOP_2:%.*]], label [[EXIT]]
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; CHECK: loop.2:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_2:%.*]]
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; CHECK: latch.2:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_2:%.*]] = icmp ule i64 2, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_2]], label [[LOOP_3:%.*]], label [[EXIT]]
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; CHECK: loop.3:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_3:%.*]]
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; CHECK: latch.3:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_3:%.*]] = icmp ule i64 3, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_3]], label [[LOOP_4:%.*]], label [[EXIT]]
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; CHECK: loop.4:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_4:%.*]]
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; CHECK: latch.4:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_4:%.*]] = icmp ule i64 4, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_4]], label [[LOOP_5:%.*]], label [[EXIT]]
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; CHECK: loop.5:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_5:%.*]]
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; CHECK: latch.5:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_5:%.*]] = icmp ule i64 5, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_5]], label [[LOOP_6:%.*]], label [[EXIT]]
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; CHECK: loop.6:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_6:%.*]]
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; CHECK: latch.6:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_6:%.*]] = icmp ule i64 6, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_6]], label [[LOOP_7:%.*]], label [[EXIT]]
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; CHECK: loop.7:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_7:%.*]]
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; CHECK: latch.7:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_7:%.*]] = icmp ule i64 7, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_7]], label [[LOOP_8:%.*]], label [[EXIT]]
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; CHECK: loop.8:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_8:%.*]]
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; CHECK: latch.8:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_8:%.*]] = icmp ule i64 8, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_8]], label [[LOOP_9:%.*]], label [[EXIT]]
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; CHECK: loop.9:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_9:%.*]]
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; CHECK: latch.9:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_9:%.*]] = icmp ule i64 9, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_9]], label [[LOOP_10:%.*]], label [[EXIT]]
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; CHECK: loop.10:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[LATCH_10:%.*]]
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; CHECK: latch.10:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2_10:%.*]] = icmp ule i64 10, [[N]]
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; CHECK-NEXT: br i1 [[CMP2_10]], label [[LOOP_11:%.*]], label [[EXIT]]
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; CHECK: loop.11:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br i1 false, label [[LATCH_11:%.*]], label [[EXIT]]
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; CHECK: latch.11:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: br label [[EXIT]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [0, %entry], [%iv.next, %latch]
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%iv.next = add i64 %iv, 1
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call void @bar()
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%cmp1 = icmp ule i64 %iv, 10
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br i1 %cmp1, label %latch, label %exit
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latch:
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call void @bar()
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%cmp2 = icmp ule i64 %iv, %N
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br i1 %cmp2, label %loop, label %exit
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exit:
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ret void
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}
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; TODO: We could partially unroll this by 2.
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define void @test3(i64 %N, i64 %M) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[N_MASKED:%.*]] = and i64 [[N:%.*]], 65520
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; CHECK-NEXT: [[M_MASKED:%.*]] = and i64 [[M:%.*]], 65520
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP1:%.*]] = icmp ule i64 [[IV]], [[N_MASKED]]
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; CHECK-NEXT: br i1 [[CMP1]], label [[LATCH]], label [[EXIT:%.*]]
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; CHECK: latch:
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; CHECK-NEXT: call void @bar()
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; CHECK-NEXT: [[CMP2:%.*]] = icmp ule i64 [[IV]], [[M_MASKED]]
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; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP]], label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%N.masked = and i64 %N, 65520 ; 0xfff0
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%M.masked = and i64 %M, 65520 ; 0xfff0
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br label %loop
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loop:
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%iv = phi i64 [0, %entry], [%iv.next, %latch]
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%iv.next = add i64 %iv, 1
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call void @bar()
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%cmp1 = icmp ule i64 %iv, %N.masked
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br i1 %cmp1, label %latch, label %exit
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latch:
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call void @bar()
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%cmp2 = icmp ule i64 %iv, %M.masked
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br i1 %cmp2, label %loop, label %exit
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exit:
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ret void
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}
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