Pirama Arumuga Nainar 45a5052ae3 Fix fptosi, fptoui from f16 vectors to i8, i16 vectors ... Summary: Convert f16 vectors to corresponding f32 vectors before doing the conversion to int. Add tests for v4f16, v8f16. Reviewers: ab, jmolloy Subscribers: llvm-commits, srhines Differential Revision: http://reviews.llvm.org/D14936 llvm-svn: 255263		2015-12-10 17:16:49 +00:00
..
AsmParser	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
Disassembler	[AArch64] Add ARMv8.2-A UAO PSTATE bit	2015-11-26 15:32:30 +00:00
InstPrinter	[AArch64] Add ARMv8.2-A Statistical Profiling Extension	2015-12-01 10:48:51 +00:00
MCTargetDesc	[AArch64] Add ARMv8.2-A FP16 scalar instructions	2015-11-27 13:04:48 +00:00
TargetInfo
Utils	[AArch64] Add ARMv8.2-A Statistical Profiling Extension	2015-12-01 10:48:51 +00:00
AArch64.h
AArch64.td	[AArch64]: Add support for Cortex-A35	2015-12-02 11:53:44 +00:00
AArch64A53Fix835769.cpp	AArch64: Remove implicit ilist iterator conversions, NFC	2015-10-13 20:02:15 +00:00
AArch64A57FPLoadBalancing.cpp
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp	AArch64: Remove implicit ilist iterator conversions, NFC	2015-10-13 20:02:15 +00:00
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp	AArch64: Remove implicit ilist iterator conversions, NFC	2015-10-13 20:02:15 +00:00
AArch64CallingConvention.h	Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef.	2015-12-05 07:13:35 +00:00
AArch64CallingConvention.td	[CXX TLS calling convention] Add support for AArch64.	2015-12-08 00:14:38 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp	AArch64: Make getNextNode() cleanup in r249764 more clear	2015-10-09 16:54:54 +00:00
AArch64CollectLOH.cpp
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp	AArch64FastISel: Use cbz/cbnz to branch on i1	2015-12-03 17:19:58 +00:00
AArch64FrameLowering.cpp	Remove windows line endings introduced by r252177. NFC.	2015-11-05 21:54:58 +00:00
AArch64FrameLowering.h	[AArch64] Enable shrink-wrapping by default.	2015-11-18 23:12:20 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td	[AArch64] Fix FP16 vector instructions that should only accept low registers	2015-12-09 14:32:11 +00:00
AArch64InstrInfo.cpp	replace MachineCombinerPattern namespace and enum with enum class; NFCI	2015-11-05 19:34:57 +00:00
AArch64InstrInfo.h	replace MachineCombinerPattern namespace and enum with enum class; NFCI	2015-11-05 19:34:57 +00:00
AArch64InstrInfo.td	Define selection for v4f16, v8f16 scalar_to_vector	2015-12-08 23:07:06 +00:00
AArch64ISelDAGToDAG.cpp	[AArch64] Fix a corner case in BitFeild select	2015-12-01 19:17:49 +00:00
AArch64ISelLowering.cpp	Fix fptosi, fptoui from f16 vectors to i8, i16 vectors	2015-12-10 17:16:49 +00:00
AArch64ISelLowering.h	[AArch64] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()	2015-11-10 18:11:37 +00:00
AArch64LoadStoreOptimizer.cpp	[AArch64]Merge narrow zero stores to a wider store	2015-11-20 21:14:07 +00:00
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp	AArch64: Remove implicit ilist iterator conversions, NFC	2015-10-13 20:02:15 +00:00
AArch64RegisterInfo.cpp	[CXX TLS calling convention] Add support for AArch64.	2015-12-08 00:14:38 +00:00
AArch64RegisterInfo.h
AArch64RegisterInfo.td	[AArch64] Add ARMv8.2-A FP16 vector instructions	2015-12-08 12:16:10 +00:00
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp	[AArch64] Add subtarget features for ARMv8.2-A	2015-11-26 15:23:32 +00:00
AArch64Subtarget.h	[AArch64]: Add support for Cortex-A35	2015-12-02 11:53:44 +00:00
AArch64TargetMachine.cpp	constify the Function parameter to the TTI creation callback and	2015-09-16 23:38:13 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp	[AArch64][ARM] Don't base interleaved op legality on type alloc size.	2015-12-09 01:19:50 +00:00
AArch64TargetTransformInfo.h	constify the Function parameter to the TTI creation callback and	2015-09-16 23:38:13 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile