Dmitry Preobrazhensky d45a36011a [AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction ... See bug 36558: https://bugs.llvm.org/show_bug.cgi?id=36558 Differential Revision: https://reviews.llvm.org/D43950 Reviewers: artem.tamazov, arsenm llvm-svn: 327299		2018-03-12 17:29:24 +00:00
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AArch64	[AArch64] Add support for secrel add/load/store relocations for COFF	2018-03-01 20:42:28 +00:00
AMDGPU	[AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction	2018-03-12 17:29:24 +00:00
ARM	Don't treat .symver as a regular alias definition.	2018-03-09 03:13:37 +00:00
AsmParser	Revert "[DWARF] Fix mixing assembler -g with DWARF .file directives."	2018-03-09 00:11:54 +00:00
AVR	[AVR] Implement some missing code paths	2017-12-11 11:01:27 +00:00
BPF	bpf: New disassembler testcases for 32-bit subregister support	2018-02-23 23:49:35 +00:00
COFF	MC intel asm parser: Allow @ at the start of function names.	2018-03-12 12:47:27 +00:00
Disassembler	[AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction	2018-03-12 17:29:24 +00:00
ELF	Revert "Reapply "[DWARFv5] Emit file 0 to the line table.""	2018-03-07 16:27:44 +00:00
Hexagon	[Hexagon] Add trap1 instruction	2018-03-01 21:54:08 +00:00
Lanai
MachO	[DebugInfo] Support DWARF v5 source code embedding extension	2018-02-23 23:01:06 +00:00
Markup
Mips	[mips] Correct the definition of m(f|t)c(0|2)	2018-03-07 11:39:48 +00:00
PowerPC	[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.	2018-02-23 15:55:16 +00:00
RISCV	[RISCV] Implement MC relaxations for compressed instructions.	2018-03-02 22:04:12 +00:00
Sparc
SystemZ
WebAssembly	[WebAssembly] Avoid cast ExprType to wasm::ValType	2018-03-02 21:33:14 +00:00
X86	[X86] Add assembler/disassembler support for blendm with zero masking and broacast.	2018-02-23 20:48:44 +00:00