Dmitry Preobrazhensky d45a36011a [AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction ... See bug 36558: https://bugs.llvm.org/show_bug.cgi?id=36558 Differential Revision: https://reviews.llvm.org/D43950 Reviewers: artem.tamazov, arsenm llvm-svn: 327299		2018-03-12 17:29:24 +00:00
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AArch64	[AArch64] Fix spelling of ICH_ELRSR_EL2 system register	2018-02-06 09:39:04 +00:00
AMDGPU	[AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction	2018-03-12 17:29:24 +00:00
ARC	[ARC] Add instruction subset for the ARC backend.	2017-12-02 05:25:17 +00:00
ARM	[ARM]Decoding MSR with unpredictable destination register causes an assert	2018-03-06 15:21:19 +00:00
Hexagon	[Hexagon] Remove trailing spaces, NFC	2017-11-22 20:43:00 +00:00
Lanai
Mips	[mips] Define certain instructions in microMIPS32r3	2018-02-08 09:25:17 +00:00
PowerPC	[PowerPC] Code cleanup. Remove instructions that were withdrawn from Power 9.	2018-02-23 15:55:16 +00:00
Sparc
SystemZ	[SystemZ] Add support for IBM z14 processor (3/3)	2017-07-17 17:44:20 +00:00
X86	[X86][3DNow!] Add PFRCP reg-reg disassembler test case (PR21168)	2018-02-17 14:58:16 +00:00
XCore