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7d791c15c9
On big-endian machines the high and low parts of the value accessed by ldrexd and strexd are swapped around. To account for this we swap inputs and outputs in ISelLowering. Patch by Bharathi Seshadri. llvm-svn: 306865
27 lines
828 B
LLVM
27 lines
828 B
LLVM
; RUN: llc -verify-machineinstrs -mtriple=armebv8-linux-gnueabi -O0 %s -o - | FileCheck %s
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@x = global i64 10, align 8
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@y = global i64 20, align 8
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@z = global i64 20, align 8
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; CHECK_LABEL: main:
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; CHECK: ldr [[R2:r[0-9]+]], {{\[}}[[R1:r[0-9]+]]{{\]}}
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; CHECK-NEXT: ldr [[R1]], {{\[}}[[R1]], #4]
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; CHECK: mov [[R4:r[0-9]+]], [[R2]]
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; CHECK-NEXT: mov [[R5:r[0-9]+]], [[R1]]
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; CHECK: ldr [[R2]], {{\[}}[[R1]]{{\]}}
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; CHECK-NEXT: ldr [[R1]], {{\[}}[[R1]], #4]
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; CHECK: mov [[R6:r[0-9]+]], [[R2]]
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; CHECK-NEXT: mov [[R7:r[0-9]+]], [[R1]]
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define arm_aapcs_vfpcc i32 @main() #0 {
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entry:
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%retval = alloca i32, align 4
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store i32 0, i32* %retval, align 4
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%0 = load i64, i64* @z, align 8
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%1 = load i64, i64* @x, align 8
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%2 = cmpxchg i64* @y, i64 %0, i64 %1 seq_cst seq_cst
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%3 = extractvalue { i64, i1 } %2, 1
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ret i32 0
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}
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