Sanjay Patel 1c7a59cca6 [X86] Merge negated ISD::SUB nodes into X86ISD::SUB equivalent (PR40483) ... Follow up to D58597, where it was noted that the commuted ISD::SUB variant was having problems with lack of combines. See also D63958 where we untangled setcc/sub pairs. Differential Revision: https://reviews.llvm.org/D58875 llvm-svn: 365791		2019-07-11 15:56:33 +00:00
..
AArch64	[SDAG] commute setcc operands to match a subtract	2019-07-10 23:23:54 +00:00
AMDGPU	[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support	2019-07-11 14:45:03 +00:00
ARC
ARM	[ARM][ParallelDSP] Change the search for smlads	2019-07-11 07:47:50 +00:00
AVR
BPF	[BPF] Support for compile once and run everywhere	2019-07-09 15:28:41 +00:00
Generic
Hexagon
Inputs
Lanai	[SDAG] commute setcc operands to match a subtract	2019-07-10 23:23:54 +00:00
Mips	[MIPS GlobalISel] Skip copies in addUseDef and addDefUses	2019-07-11 09:28:34 +00:00
MIR	AMDGPU: Serialize mode from MachineFunctionInfo	2019-07-10 16:09:26 +00:00
MSP430
NVPTX
PowerPC	[NFC][PowerPC] Added test to track current behaviour of TailDup	2019-07-11 09:43:03 +00:00
RISCV	[RISCV] Fix ICE in isDesirableToCommuteWithShift	2019-07-09 16:24:16 +00:00
SPARC
SystemZ
Thumb
Thumb2	[ARM][LowOverheadLoops] Correct offset checking	2019-07-11 09:56:15 +00:00
WebAssembly	[WebAssembly] Print error message for llvm.clear_cache intrinsic	2019-07-11 05:55:47 +00:00
WinCFGuard
WinEH
X86	[X86] Merge negated ISD::SUB nodes into X86ISD::SUB equivalent (PR40483)	2019-07-11 15:56:33 +00:00
XCore