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llvm-mirror/test/CodeGen/PowerPC/fp64-to-int16.ll
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

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LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 < %s | FileCheck %s
target triple = "powerpc64le--linux-gnu"
define i1 @Test(double %a) {
; CHECK-LABEL: Test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xscvdpsxws 1, 1
; CHECK-NEXT: mfvsrwz 3, 1
; CHECK-NEXT: xori 3, 3, 65534
; CHECK-NEXT: cntlzw 3, 3
; CHECK-NEXT: srwi 3, 3, 5
; CHECK-NEXT: # implicit-def: $x4
; CHECK-NEXT: mr 4, 3
; CHECK-NEXT: mr 3, 4
; CHECK-NEXT: blr
entry:
%conv = fptoui double %a to i16
%cmp = icmp eq i16 %conv, -2
ret i1 %cmp
}