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515efbb17e
For RISCV branch instructions, we need to preserve relocation types when linker relaxation enabled, so then linker could modify offset when the branch offsets changed. We preserve relocation types by define shouldForceRelocation. IsResolved return by evaluateFixup will always false when shouldForceRelocation return true. It will make RISCV MC Branch Relaxation always relax 16-bit branches to 32-bit form, even if the symbol actually could be resolved. To avoid 16-bit branches always relax to 32-bit form when linker relaxation enabled, we add a new parameter WasForced to indicate that the symbol actually couldn't be resolved and not forced by shouldForceRelocation return true. RISCVAsmBackend::fixupNeedsRelaxationAdvanced could relax branches with unresolved symbols by (!IsResolved && !WasForced). RISCV MC Branch Relaxation is needed because RISCV could perform 32-bit to 16-bit transformation in MC layer. Differential Revision: https://reviews.llvm.org/D46350 llvm-svn: 332696
105 lines
2.6 KiB
ArmAsm
105 lines
2.6 KiB
ArmAsm
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+c < %s \
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# RUN: | llvm-objdump -d -riscv-no-aliases - | FileCheck -check-prefix=INSTR %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+c,+relax < %s \
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# RUN: | llvm-objdump -d -riscv-no-aliases - | FileCheck -check-prefix=RELAX-INSTR %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+c,+relax < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELAX-RELOC %s
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FAR_JUMP_NEGATIVE:
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c.nop
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.space 2000
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FAR_BRANCH_NEGATIVE:
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c.nop
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.space 256
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NEAR_NEGATIVE:
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c.nop
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start:
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c.bnez a0, NEAR
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#INSTR: c.bnez a0, 56
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#RELAX-INSTR: c.bnez a0, 0
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#RELAX-RELOC: R_RISCV_RVC_BRANCH
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c.bnez a0, NEAR_NEGATIVE
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#INSTR: c.bnez a0, -4
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#RELAX-INSTR: c.bnez a0, 0
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#RELAX-RELOC: R_RISCV_RVC_BRANCH
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c.bnez a0, FAR_BRANCH
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#INSTR-NEXT: bne a0, zero, 310
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#RELAX-INSTR-NEXT: bne a0, zero, 0
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#RELAX-RELOC: R_RISCV_BRANCH
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c.bnez a0, FAR_BRANCH_NEGATIVE
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#INSTR-NEXT: bne a0, zero, -268
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#RELAX-INSTR-NEXT: bne a0, zero, 0
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#RELAX-RELOC: R_RISCV_BRANCH
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c.bnez a0, FAR_JUMP
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#INSTR-NEXT: bne a0, zero, 2304
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#RELAX-INSTR-NEXT: bne a0, zero, 0
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#RELAX-RELOC: R_RISCV_BRANCH
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c.bnez a0, FAR_JUMP_NEGATIVE
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#INSTR-NEXT: bne a0, zero, -2278
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#RELAX-INSTR-NEXT: bne a0, zero, 0
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#RELAX-RELOC: R_RISCV_BRANCH
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c.beqz a0, NEAR
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#INSTR-NEXT: c.beqz a0, 36
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#RELAX-INSTR-NEXT: c.beqz a0, 0
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#RELAX-RELOC: R_RISCV_RVC_BRANCH
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c.beqz a0, NEAR_NEGATIVE
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#INSTR-NEXT: c.beqz a0, -24
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#RELAX-INSTR-NEXT: c.beqz a0, 0
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#RELAX-RELOC: R_RISCV_RVC_BRANCH
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c.beqz a0, FAR_BRANCH
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#INSTR-NEXT: beq a0, zero, 290
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#RELAX-INSTR-NEXT: beq a0, zero, 0
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#RELAX-RELOC: R_RISCV_BRANCH
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c.beqz a0, FAR_BRANCH_NEGATIVE
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#INSTR-NEXT: beq a0, zero, -288
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#RELAX-INSTR-NEXT: beq a0, zero, 0
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#RELAX-RELOC: R_RISCV_BRANCH
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c.beqz a0, FAR_JUMP
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#INSTR-NEXT: beq a0, zero, 2284
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#RELAX-INSTR-NEXT: beq a0, zero, 0
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#RELAX-RELOC: R_RISCV_BRANCH
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c.beqz a0, FAR_JUMP_NEGATIVE
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#INSTR-NEXT: beq a0, zero, -2298
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#RELAX-INSTR-NEXT: beq a0, zero, 0
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#RELAX-RELOC: R_RISCV_BRANCH
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c.j NEAR
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#INSTR-NEXT: c.j 16
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#RELAX-INSTR-NEXT: c.j 0
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#RELAX-RELOC: R_RISCV_RVC_JUMP
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c.j NEAR_NEGATIVE
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#INSTR-NEXT: c.j -44
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#RELAX-INSTR-NEXT: c.j 0
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#RELAX-RELOC: R_RISCV_RVC_JUMP
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c.j FAR_BRANCH
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#INSTR-NEXT: c.j 270
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#RELAX-INSTR-NEXT: c.j 0
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#RELAX-RELOC: R_RISCV_RVC_JUMP
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c.j FAR_BRANCH_NEGATIVE
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#INSTR-NEXT: c.j -306
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#RELAX-INSTR-NEXT: c.j 0
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#RELAX-RELOC: R_RISCV_RVC_JUMP
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c.j FAR_JUMP
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#INSTR-NEXT: jal zero, 2268
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#RELAX-INSTR-NEXT: jal zero, 0
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#RELAX-RELOC: R_RISCV_JAL
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c.j FAR_JUMP_NEGATIVE
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#INSTR-NEXT: jal zero, -2314
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#RELAX-INSTR-NEXT: jal zero, 0
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#RELAX-RELOC: R_RISCV_JAL
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NEAR:
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c.nop
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.space 256
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FAR_BRANCH:
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c.nop
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.space 2000
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FAR_JUMP:
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c.nop
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