1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/CodeGen
Sanjay Patel a0ef9a3456 [DAGCombiner] transform sub-of-shifted-signbit to add
This is exchanging a sub-of-1 with add-of-minus-1:
https://rise4fun.com/Alive/plKAH

This is another step towards improving select-of-constants codegen (see D48970).

x86 is the motivating target, and those diffs all appear to be wins. PPC and AArch64 look neutral.
I've limited this to early combining (!LegalOperations) in case a target wants to reverse it, but
I think canonicalizing to 'add' is more likely to produce further transforms because we have more
folds for 'add'.

Differential Revision: https://reviews.llvm.org/D49924

llvm-svn: 338317
2018-07-30 22:21:37 +00:00
..
AArch64 [DAGCombiner] transform sub-of-shifted-signbit to add 2018-07-30 22:21:37 +00:00
AMDGPU AMDGPU: Reduce code size with fcanonicalize (fneg x) 2018-07-30 12:16:58 +00:00
ARC
ARM Reapply "Fix crash on inline asm with 64bit matching input in 32bit GPR" 2018-07-30 16:48:39 +00:00
AVR
BPF bpf: add missing RegState to notify MachineInstr verifier necessary register usage 2018-07-27 16:58:52 +00:00
Generic
Hexagon [Hexagon] Simplify A4_rcmp[n]eqi R, 0 2018-07-30 14:28:02 +00:00
Inputs
Lanai
Mips [DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B) 2018-07-28 00:27:25 +00:00
MIR [DebugInfo][X86] Add start-after flags to MIR tests 2018-07-12 14:36:48 +00:00
MSP430
Nios2
NVPTX finish: [FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests 2018-07-11 20:31:51 +00:00
PowerPC [DAGCombiner] transform sub-of-shifted-signbit to add 2018-07-30 22:21:37 +00:00
RISCV [RISCV] Add support for _interrupt attribute 2018-07-26 17:49:43 +00:00
SPARC Regenerate remainder test. 2018-07-20 13:14:29 +00:00
SystemZ [SystemZ] Test case formatting fixes 2018-07-20 12:12:10 +00:00
Thumb [ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1. 2018-07-25 18:22:22 +00:00
Thumb2 [ARM] Treat cmn immediates as legal in isLegalICmpImmediate. 2018-07-10 23:44:37 +00:00
WebAssembly Revert "[WebAssembly] Added default stack-only instruction mode for MC." 2018-07-27 23:19:51 +00:00
WinCFGuard
WinEH
X86 [DAGCombiner] transform sub-of-shifted-signbit to add 2018-07-30 22:21:37 +00:00
XCore [DAGCombiner] extend(ifpositive(X)) -> shift-right (not X) 2018-07-15 16:27:07 +00:00