RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
Code Issues Projects Releases Wiki Activity
0a0d8f34cb
llvm-mirror/test/CodeGen/MIR
History
Francis Visoiu Mistrih ce6a8314c3 [DebugInfo][X86] Add start-after flags to MIR tests 
These tests would fail with -verify-machineinstrs because the MI
generated from the IR would be merged with the one already in the MIR
files, and we get the following error:

```
*** Bad machine code: Function has NoVRegs property but there are VReg operands ***
- function:    f
```

Differential Revision: https://reviews.llvm.org/D49191

llvm-svn: 336907
2018-07-12 14:36:48 +00:00
..
AArch64
AMDGPU
ARM
Generic [MIRParser] Add parser support for 'true' and 'false' i1s. 2018-06-05 00:17:13 +00:00
Hexagon
Mips
NVPTX
PowerPC
WebAssembly
X86 [DebugInfo][X86] Add start-after flags to MIR tests 2018-07-12 14:36:48 +00:00
README

README 

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.