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86 lines
3.2 KiB
LLVM
86 lines
3.2 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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; Make sure the add and load are reduced to 32-bits even with the
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; bitcast to vector.
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; GCN-LABEL: {{^}}bitcast_int_to_vector_extract_0:
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; GCN-DAG: s_load_dword [[B:s[0-9]+]]
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; GCN-DAG: buffer_load_dword [[A:v[0-9]+]]
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; GCN: v_add_i32_e32 [[ADD:v[0-9]+]], vcc, [[B]], [[A]]
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; GCN: buffer_store_dword [[ADD]]
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define amdgpu_kernel void @bitcast_int_to_vector_extract_0(i32 addrspace(1)* %out, i64 addrspace(1)* %in, i64 %b) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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%a = load i64, i64 addrspace(1)* %gep
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%add = add i64 %a, %b
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%val.bc = bitcast i64 %add to <2 x i32>
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%extract = extractelement <2 x i32> %val.bc, i32 0
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store i32 %extract, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}bitcast_fp_to_vector_extract_0:
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; GCN: buffer_load_dwordx2
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; GCN: v_add_f64
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; GCN: buffer_store_dword v
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define amdgpu_kernel void @bitcast_fp_to_vector_extract_0(i32 addrspace(1)* %out, double addrspace(1)* %in, double %b) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep = getelementptr double, double addrspace(1)* %in, i32 %tid
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%a = load double, double addrspace(1)* %gep
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%add = fadd double %a, %b
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%val.bc = bitcast double %add to <2 x i32>
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%extract = extractelement <2 x i32> %val.bc, i32 0
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store i32 %extract, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}bitcast_int_to_fpvector_extract_0:
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; GCN: buffer_load_dwordx2
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; GCN: v_add_i32
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; GCN: buffer_store_dword
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define amdgpu_kernel void @bitcast_int_to_fpvector_extract_0(float addrspace(1)* %out, i64 addrspace(1)* %in, i64 %b) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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%a = load i64, i64 addrspace(1)* %gep
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%add = add i64 %a, %b
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%val.bc = bitcast i64 %add to <2 x float>
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%extract = extractelement <2 x float> %val.bc, i32 0
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store float %extract, float addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}no_extract_volatile_load_extract0:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_store_dword v
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define amdgpu_kernel void @no_extract_volatile_load_extract0(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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entry:
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%vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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%elt0 = extractelement <4 x i32> %vec, i32 0
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store i32 %elt0, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}no_extract_volatile_load_extract2:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_store_dword v
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define amdgpu_kernel void @no_extract_volatile_load_extract2(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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entry:
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%vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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%elt2 = extractelement <4 x i32> %vec, i32 2
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store i32 %elt2, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}no_extract_volatile_load_dynextract:
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; GCN: buffer_load_dwordx4
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; GCN: buffer_store_dword v
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define amdgpu_kernel void @no_extract_volatile_load_dynextract(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %idx) {
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entry:
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%vec = load volatile <4 x i32>, <4 x i32> addrspace(1)* %in
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%eltN = extractelement <4 x i32> %vec, i32 %idx
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store i32 %eltN, i32 addrspace(1)* %out
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ret void
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}
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