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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00
llvm-mirror/lib/Target/Alpha
Dan Gohman 0c4e55a2f8 Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.

llvm-svn: 82790
2009-09-25 18:54:59 +00:00
..
AsmPrinter remove all but one reference to TargetRegisterDesc::AsmName. 2009-09-13 20:31:40 +00:00
TargetInfo Normalize makefile comments and sort cmake file lists. 2009-08-31 13:05:24 +00:00
Alpha.h Add new helpers for registering targets. 2009-07-25 06:49:55 +00:00
Alpha.td Switch Alpha over to the new call lowering style. New code mostly 2009-07-19 01:11:32 +00:00
AlphaBranchSelector.cpp Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
AlphaCallingConv.td Switch Alpha over to the new call lowering style. New code mostly 2009-07-19 01:11:32 +00:00
AlphaCodeEmitter.cpp Tabs -> spaces, and remove trailing whitespace. 2009-09-20 02:20:51 +00:00
AlphaInstrFormats.td Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. 2008-12-03 18:15:48 +00:00
AlphaInstrInfo.cpp Remove unused member functions. 2009-07-24 07:43:59 +00:00
AlphaInstrInfo.h Remove unused member functions. 2009-07-24 07:43:59 +00:00
AlphaInstrInfo.td move this fp select into a pattern 2009-08-08 12:49:07 +00:00
AlphaISelDAGToDAG.cpp Rename getTargetNode to getMachineNode, for consistency with the 2009-09-25 18:54:59 +00:00
AlphaISelLowering.cpp Tabs -> spaces, and remove trailing whitespace. 2009-09-20 02:20:51 +00:00
AlphaISelLowering.h Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes. 2009-09-18 21:02:19 +00:00
AlphaJITInfo.cpp remove the last uses of Config/alloca.h 2009-08-23 22:57:38 +00:00
AlphaJITInfo.h Privatize this map. 2009-06-25 18:13:04 +00:00
AlphaLLRP.cpp Remove non-DebugLoc versions of BuildMI from Alpha and Cell. 2009-02-13 02:30:42 +00:00
AlphaMachineFunctionInfo.h Add explicit keywords. 2009-06-05 23:05:51 +00:00
AlphaMCAsmInfo.cpp Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
AlphaMCAsmInfo.h Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
AlphaRegisterInfo.cpp eliminate the last DOUTs from the targets. 2009-08-23 06:49:22 +00:00
AlphaRegisterInfo.h Committed the wrong version in my last commit. 2009-06-26 00:17:05 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
AlphaSubtarget.h Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
AlphaTargetMachine.cpp Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
AlphaTargetMachine.h Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple 2009-08-12 07:22:17 +00:00
CMakeLists.txt Normalize makefile comments and sort cmake file lists. 2009-08-31 13:05:24 +00:00
Makefile Unbreak build 2009-07-19 01:33:04 +00:00
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html