David Green 5da5b28644 [ARM] Move add(VMLALVA(A, X, Y), B) to VMLALVA(add(A, B), X, Y) ... For i64 reductions we currently try and convert add(VMLALV(X, Y), B) to VMLALVA(B, X, Y), incorporating the addition into the VMLALVA. If we have an add of an existing VMLALVA, this patch pushes the add up above the VMLALVA so that it may potentially be simplified further, for example being folded into another VMLALV. Differential Revision: https://reviews.llvm.org/D105686		2021-07-14 20:06:49 +01:00
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AArch64	[RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs	2021-07-14 04:29:42 -07:00
AMDGPU	GlobalISel: Handle lowering non-power-of-2 extloads	2021-07-14 11:54:11 -04:00
ARC
ARM	ARM: reuse existing libcall global variable if possible.	2021-07-14 14:14:47 +01:00
AVR
BPF	[InstCombine] Fold (select C, (gep Ptr, Idx), Ptr) -> (gep Ptr, (select C, Idx, 0)) (PR50183) (REAPPLIED)	2021-07-14 12:21:01 +01:00
Generic	[llc] Default MCUseDwarfDirectory to true	2021-07-12 17:44:02 -07:00
Hexagon
Inputs
Lanai
M68k
Mips	Mips/GlobalISel: Use more standard call lowering infrastructure	2021-07-13 11:04:10 -04:00
MIR
MSP430
NVPTX
PowerPC	[AIX] Enable dollar sign as PC in inlineasm	2021-07-14 13:37:52 +00:00
RISCV	[RISCV] Fix the neutral element in vector 'fadd' reductions	2021-07-14 10:18:38 +01:00
SPARC
SystemZ
Thumb
Thumb2	[ARM] Move add(VMLALVA(A, X, Y), B) to VMLALVA(add(A, B), X, Y)	2021-07-14 20:06:49 +01:00
VE
WebAssembly	[WebAssembly] Codegen for v128.loadX_lane instructions	2021-07-14 11:31:53 -07:00
WinCFGuard
WinEH
X86	[RemoveRedundantDebugValues] Add a Pass that removes redundant DBG_VALUEs	2021-07-14 04:29:42 -07:00
XCore