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b1775ae908
If we are and the constant like 0xFFFFFFC00000, for now, we are using several
instructions to generate this 48bit constant and final an "and". However, we
could exploit it with two rotate instructions.
MB ME MB+63-ME
+----------------------+ +----------------------+
|0000001111111111111000| -> |0000000001111111111111|
+----------------------+ +----------------------+
0 63 0 63
Rotate left ME + 1 bit first, and then, mask it with (MB + 63 - ME, 63),
finally, rotate back. Notice that, we need to round it with 64 bit for the
wrapping case.
Reviewed by: ChenZheng, Nemanjai
Differential Revision: https://reviews.llvm.org/D71831
98 lines
3.3 KiB
LLVM
98 lines
3.3 KiB
LLVM
; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s -check-prefix=PPC32-LINUX
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=PPC64-LINUX
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; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -frame-pointer=all | FileCheck %s -check-prefix=PPC32-LINUX
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -frame-pointer=all | FileCheck %s -check-prefix=PPC64-LINUX
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; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s -check-prefix=PPC32-LINUX
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; RUN: llc < %s -mcpu=pwr4 -mattr=-altivec -verify-machineinstrs \
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; RUN: -mtriple=powerpc-ibm-aix-xcoff | FileCheck %s -check-prefix=PPC32-AIX
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; RUN: llc < %s -mcpu=pwr4 -mattr=-altivec -verify-machineinstrs \
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; RUN: -mtriple=powerpc-ibm-aix-xcoff -frame-pointer=all | FileCheck %s \
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; RUN: -check-prefix=PPC32-AIX
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; RUN: llc < %s -mcpu=pwr4 -mattr=-altivec -verify-machineinstrs \
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; RUN: -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s -check-prefix=PPC64-AIX
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; RUN: llc < %s -mcpu=pwr4 -mattr=-altivec -verify-machineinstrs \
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; RUN: -mtriple=powerpc64-ibm-aix-xcoff -frame-pointer=all | FileCheck %s \
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; RUN: -check-prefix=PPC64-AIX
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define i32* @f1(i32 %n) nounwind {
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%tmp = alloca i32, i32 %n ; <i32*> [#uses=1]
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ret i32* %tmp
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}
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; PPC32-LINUX-LABEL: f1
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; PPC32-LINUX: stwu 1, -32(1)
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; PPC32-LINUX-NEXT: slwi 3, 3, 2
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; PPC32-LINUX-NEXT: addi 3, 3, 15
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; PPC32-LINUX-NEXT: stw 31, 28(1)
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; PPC32-LINUX-NEXT: mr 31, 1
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; PPC32-LINUX-NEXT: rlwinm 3, 3, 0, 0, 27
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; PPC32-LINUX-NEXT: neg 3, 3
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; PPC32-LINUX-NEXT: addi 4, 31, 32
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; PPC32-LINUX-NEXT: stwux 4, 1, 3
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; PPC32-LINUX-NEXT: lwz 31, 0(1)
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; PPC32-LINUX-NEXT: addi 3, 1, 16
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; PPC32-LINUX-NEXT: lwz 0, -4(31)
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; PPC32-LINUX-NEXT: mr 1, 31
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; PPC32-LINUX-NEXT: mr 31, 0
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; PPC32-LINUX-NEXT: blr
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; PPC64-LINUX-LABEL: f1
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; PPC64-LINUX: std 31, -8(1)
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; PPC64-LINUX-NEXT: stdu 1, -64(1)
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; PPC64-LINUX-NEXT: rldic 3, 3, 2, 30
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; PPC64-LINUX-NEXT: mr 31, 1
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; PPC64-LINUX-NEXT: addi 3, 3, 15
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; PPC64-LINUX-NEXT: rldicl 3, 3, 60, 4
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; PPC64-LINUX-NEXT: addi 4, 31, 64
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; PPC64-LINUX-NEXT: rldicl 3, 3, 4, 29
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; PPC64-LINUX-NEXT: neg 3, 3
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; PPC64-LINUX-NEXT: stdux 4, 1, 3
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; The linkage area is always put on the top of the stack.
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; PPC64-LINUX-NEXT: addi 3, 1, 48
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; PPC64-LINUX-NEXT: ld 1, 0(1)
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; PPC64-LINUX-NEXT: ld 31, -8(1)
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; PPC64-LINUX-NEXT: blr
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; PPC32-AIX-LABEL: f1
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; PPC32-AIX: stw 31, -4(1)
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; PPC32-AIX-NEXT: stwu 1, -48(1)
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; PPC32-AIX-NEXT: slwi 3, 3, 2
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; PPC32-AIX-NEXT: mr 31, 1
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; PPC32-AIX-NEXT: addi 3, 3, 15
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; PPC32-AIX-NEXT: addi 4, 31, 48
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; PPC32-AIX-NEXT: rlwinm 3, 3, 0, 0, 27
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; PPC32-AIX-NEXT: neg 3, 3
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; PPC32-AIX-NEXT: stwux 4, 1, 3
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; The linkage area is always put on the top of the stack.
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; PPC32-AIX-NEXT: addi 3, 1, 32
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; PPC32-AIX-NEXT: lwz 1, 0(1)
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; PPC32-AIX-NEXT: lwz 31, -4(1)
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; PPC32-AIX-NEXT: blr
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; PPC64-AIX-LABEL: f1
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; PPC64-AIX: std 31, -8(1)
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; PPC64-AIX-NEXT: stdu 1, -64(1)
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; PPC64-AIX-NEXT: rldic 3, 3, 2, 30
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; PPC64-AIX-NEXT: mr 31, 1
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; PPC64-AIX-NEXT: addi 3, 3, 15
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; PPC64-AIX-NEXT: addi 4, 31, 64
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; PPC64-AIX-NEXT: rldicl 3, 3, 60, 4
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; PPC64-AIX-NEXT: rldicl 3, 3, 4, 29
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; PPC64-AIX-NEXT: neg 3, 3
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; PPC64-AIX-NEXT: stdux 4, 1, 3
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; The linkage area is always put on the top of the stack.
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; PPC64-AIX-NEXT: addi 3, 1, 48
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; PPC64-AIX-NEXT: ld 1, 0(1)
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; PPC64-AIX-NEXT: ld 31, -8(1)
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; PPC64-AIX-NEXT: blr
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