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llvm-mirror/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
Matt Arsenault cc12b285b6 CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
2021-06-30 16:54:13 -04:00

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# RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -x mir -verify-machineinstrs \
# RUN: -xcoff-traceback-table=false -start-after=lazy-machine-block-freq -filetype=obj -o %t.o < %s
# RUN: llvm-readobj --relocs --expand-relocs --syms %t.o | FileCheck --check-prefixes=RELOC,SYM %s
# RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s
---
name: foo
alignment: 16
tracksRegLiveness: true
jumpTable:
kind: label-difference32
entries:
- id: 0
blocks: [ '%bb.0' ]
body: |
bb.0:
successors: %bb.0(0x20000000)
liveins: $r2
renamable $r3 = LWZtoc %jump-table.0, $r2 :: (load (s32) from got)
BLR implicit $lr, implicit $rm, implicit killed $r3
...
# RELOC: Relocation {{[{][[:space:]] *}}Virtual Address: 0x8
# RELOC-NEXT: Symbol: .text ([[#TXT_INDX:]])
# RELOC-NEXT: IsSigned: No
# RELOC-NEXT: FixupBitValue: 0
# RELOC-NEXT: Length: 32
# RELOC-NEXT: Type: R_POS (0x0)
# RELOC-NEXT: }
# RELOC-NEXT: Relocation {
# RELOC-NEXT: Virtual Address: 0x8
# RELOC-NEXT: Symbol: .rodata ([[#RO_INDX:]])
# RELOC-NEXT: IsSigned: No
# RELOC-NEXT: FixupBitValue: 0
# RELOC-NEXT: Length: 32
# RELOC-NEXT: Type: R_NEG (0x1)
# RELOC-NEXT: }
# SYM: Symbol {{[{][[:space:]] *}}Index: [[#TXT_INDX]]{{[[:space:]] *}}Name: .text
# SYM-NEXT: Value (RelocatableAddress): 0x0
# SYM-NEXT: Section: .text
# SYM-NEXT: Type: 0x0
# SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
# SYM-NEXT: NumberOfAuxEntries: 1
# SYM-NEXT: CSECT Auxiliary Entry {
# SYM-NEXT: Index: [[#TXT_INDX+1]]
# SYM-NEXT: SectionLen: 8
# SYM-NEXT: ParameterHashIndex: 0x0
# SYM-NEXT: TypeChkSectNum: 0x0
# SYM-NEXT: SymbolAlignmentLog2: 4
# SYM-NEXT: SymbolType: XTY_SD (0x1)
# SYM-NEXT: StorageMappingClass: XMC_PR (0x0)
# SYM-NEXT: StabInfoIndex: 0x0
# SYM-NEXT: StabSectNum: 0x0
# SYM-NEXT: }
# SYM-NEXT: }
# SYM: Symbol {{[{][[:space:]] *}}Index: [[#RO_INDX]]{{[[:space:]] *}}Name: .rodata
# SYM-NEXT: Value (RelocatableAddress): 0x8
# SYM-NEXT: Section: .text
# SYM-NEXT: Type: 0x0
# SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
# SYM-NEXT: NumberOfAuxEntries: 1
# SYM-NEXT: CSECT Auxiliary Entry {
# SYM-NEXT: Index: [[#RO_INDX+1]]
# SYM-NEXT: SectionLen: 4
# SYM-NEXT: ParameterHashIndex: 0x0
# SYM-NEXT: TypeChkSectNum: 0x0
# SYM-NEXT: SymbolAlignmentLog2: 2
# SYM-NEXT: SymbolType: XTY_SD (0x1)
# SYM-NEXT: StorageMappingClass: XMC_RO (0x1)
# SYM-NEXT: StabInfoIndex: 0x0
# SYM-NEXT: StabSectNum: 0x0
# SYM-NEXT: }
# SYM-NEXT: }
# DIS: Disassembly of section .text:
# DIS-EMPTY:
# DIS-NEXT: 00000000 <.text>:
# DIS-NEXT: 0: 80 62 00 00 lwz 3, 0(2)
# DIS-NEXT: 4: 4e 80 00 20 blr
# DIS-EMPTY:
# DIS-NEXT: 00000008 <.rodata>:
# DIS-NEXT: 8: ff ff ff f8 fmsub 31, 31, 31, 31
# DIS-EMPTY: