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6272d2fc4a
LDARX and LWARX sometimes gets optimized out by the compiler when it is critical to the correctness of the code. This inline asm generation ensures that it preserved. Differential Revision: https://reviews.llvm.org/D105754
53 lines
1.8 KiB
LLVM
53 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
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; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-32
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-64
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declare i32 @llvm.ppc.lwarx(i8*)
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define dso_local signext i32 @test_lwarx(i32* readnone %a) {
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; CHECK-64-LABEL: test_lwarx:
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; CHECK-64: # %bb.0: # %entry
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; CHECK-64-NEXT: #APP
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; CHECK-64-NEXT: lwarx 3, 0, 3
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; CHECK-64-NEXT: #NO_APP
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; CHECK-64-NEXT: extsw 3, 3
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; CHECK-64-NEXT: blr
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;
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; CHECK-32-LABEL: test_lwarx:
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; CHECK-32: # %bb.0: # %entry
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; CHECK-32-NEXT: #APP
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; CHECK-32-NEXT: lwarx 3, 0, 3
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; CHECK-32-NEXT: #NO_APP
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; CHECK-32-NEXT: blr
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entry:
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%0 = call i32 asm sideeffect "lwarx $0, ${1:y}", "=r,*Z,~{memory}"(i32* %a)
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ret i32 %0
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}
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declare i32 @llvm.ppc.stwcx(i8*, i32)
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define dso_local signext i32 @test_stwcx(i32* %a, i32 signext %b) {
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; CHECK-64-LABEL: test_stwcx:
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; CHECK-64: # %bb.0: # %entry
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; CHECK-64-NEXT: stwcx. 4, 0, 3
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; CHECK-64-NEXT: mfocrf 3, 128
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; CHECK-64-NEXT: srwi 3, 3, 28
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; CHECK-64-NEXT: extsw 3, 3
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; CHECK-64-NEXT: blr
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;
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; CHECK-32-LABEL: test_stwcx:
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; CHECK-32: # %bb.0: # %entry
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; CHECK-32-NEXT: stwcx. 4, 0, 3
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; CHECK-32-NEXT: mfocrf 3, 128
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; CHECK-32-NEXT: srwi 3, 3, 28
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; CHECK-32-NEXT: blr
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entry:
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%0 = bitcast i32* %a to i8*
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%1 = tail call i32 @llvm.ppc.stwcx(i8* %0, i32 %b)
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ret i32 %1
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}
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