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6887a6b0ee
Convert `0 - abs(x)` to `smin (x, -x)` if `smin` is a legal operation. Verification: https://alive2.llvm.org/ce/z/vpquFR Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D92637
71 lines
2.3 KiB
LLVM
71 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
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; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
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; RUN: -check-prefix=CHECK-LE %s
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declare i64 @llvm.abs.i64(i64, i1 immarg)
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declare <2 x i64> @llvm.abs.v2i64(<2 x i64>, i1)
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declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
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declare <8 x i16> @llvm.abs.v8i16(<8 x i16>, i1)
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declare <16 x i8> @llvm.abs.v16i8(<16 x i8>, i1)
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define i64@neg_abs(i64 %x) {
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; CHECK-LE-LABEL: neg_abs:
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; CHECK-LE: # %bb.0:
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; CHECK-LE-NEXT: sradi r4, r3, 63
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; CHECK-LE-NEXT: xor r3, r3, r4
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; CHECK-LE-NEXT: sub r3, r4, r3
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; CHECK-LE-NEXT: blr
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%abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
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%neg = sub nsw i64 0, %abs
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ret i64 %neg
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}
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define <2 x i64> @neg_abs_v2i64(<2 x i64> %0) {
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; CHECK-LE-LABEL: neg_abs_v2i64:
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; CHECK-LE: # %bb.0:
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; CHECK-LE-NEXT: xxlxor vs35, vs35, vs35
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; CHECK-LE-NEXT: vsubudm v3, v3, v2
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; CHECK-LE-NEXT: vminsd v2, v2, v3
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; CHECK-LE-NEXT: blr
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%abs = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %0, i1 true)
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%neg.abs = sub <2 x i64> zeroinitializer, %abs
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ret <2 x i64> %neg.abs
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}
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define <4 x i32> @neg_abs_v4i32(<4 x i32> %0) {
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; CHECK-LE-LABEL: neg_abs_v4i32:
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; CHECK-LE: # %bb.0:
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; CHECK-LE-NEXT: xxlxor vs35, vs35, vs35
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; CHECK-LE-NEXT: vsubuwm v3, v3, v2
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; CHECK-LE-NEXT: vminsw v2, v2, v3
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; CHECK-LE-NEXT: blr
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %0, i1 true)
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%neg.abs = sub <4 x i32> zeroinitializer, %abs
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ret <4 x i32> %neg.abs
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}
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define <8 x i16> @neg_abs_v8i16(<8 x i16> %0) {
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; CHECK-LE-LABEL: neg_abs_v8i16:
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; CHECK-LE: # %bb.0:
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; CHECK-LE-NEXT: xxlxor vs35, vs35, vs35
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; CHECK-LE-NEXT: vsubuhm v3, v3, v2
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; CHECK-LE-NEXT: vminsh v2, v2, v3
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; CHECK-LE-NEXT: blr
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%abs = call <8 x i16> @llvm.abs.v8i16(<8 x i16> %0, i1 true)
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%neg.abs = sub <8 x i16> zeroinitializer, %abs
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ret <8 x i16> %neg.abs
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}
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define <16 x i8> @neg_abs_v16i8(<16 x i8> %0) {
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; CHECK-LE-LABEL: neg_abs_v16i8:
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; CHECK-LE: # %bb.0:
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; CHECK-LE-NEXT: xxlxor vs35, vs35, vs35
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; CHECK-LE-NEXT: vsububm v3, v3, v2
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; CHECK-LE-NEXT: vminsb v2, v2, v3
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; CHECK-LE-NEXT: blr
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%abs = call <16 x i8> @llvm.abs.v16i8(<16 x i8> %0, i1 true)
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%neg.abs = sub <16 x i8> zeroinitializer, %abs
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ret <16 x i8> %neg.abs
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}
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