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134 lines
4.0 KiB
LLVM
134 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
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; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
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; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
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; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
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@glob = dso_local local_unnamed_addr global i8 0, align 1
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; Function Attrs: norecurse nounwind readnone
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define dso_local signext i32 @test_igeuc(i8 zeroext %a, i8 zeroext %b) {
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; CHECK-LABEL: test_igeuc:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sub r3, r3, r4
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; CHECK-NEXT: not r3, r3
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; CHECK-NEXT: rldicl r3, r3, 1, 63
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, %b
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%conv2 = zext i1 %cmp to i32
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ret i32 %conv2
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}
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; Function Attrs: norecurse nounwind readnone
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define dso_local signext i32 @test_igeuc_sext(i8 zeroext %a, i8 zeroext %b) {
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; CHECK-LABEL: test_igeuc_sext:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sub r3, r3, r4
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; CHECK-NEXT: rldicl r3, r3, 1, 63
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; CHECK-NEXT: addi r3, r3, -1
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, %b
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%sub = sext i1 %cmp to i32
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ret i32 %sub
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}
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; Function Attrs: norecurse nounwind readnone
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define dso_local signext i32 @test_igeuc_z(i8 zeroext %a) {
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; CHECK-LABEL: test_igeuc_z:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: li r3, 1
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, 0
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%conv2 = zext i1 %cmp to i32
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ret i32 %conv2
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}
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; Function Attrs: norecurse nounwind readnone
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define dso_local signext i32 @test_igeuc_sext_z(i8 zeroext %a) {
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; CHECK-LABEL: test_igeuc_sext_z:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: li r3, -1
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, 0
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%conv2 = sext i1 %cmp to i32
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ret i32 %conv2
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}
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; Function Attrs: norecurse nounwind
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define dso_local void @test_igeuc_store(i8 zeroext %a, i8 zeroext %b) {
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; CHECK-LABEL: test_igeuc_store:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sub r3, r3, r4
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; CHECK-NEXT: addis r5, r2, glob@toc@ha
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; CHECK-NEXT: not r3, r3
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; CHECK-NEXT: rldicl r3, r3, 1, 63
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; CHECK-NEXT: stb r3, glob@toc@l(r5)
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, %b
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%conv3 = zext i1 %cmp to i8
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store i8 %conv3, i8* @glob
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ret void
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; CHECK_LABEL: test_igeuc_store:
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}
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; Function Attrs: norecurse nounwind
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define dso_local void @test_igeuc_sext_store(i8 zeroext %a, i8 zeroext %b) {
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; CHECK-LABEL: test_igeuc_sext_store:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sub r3, r3, r4
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; CHECK-NEXT: addis r5, r2, glob@toc@ha
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; CHECK-NEXT: rldicl r3, r3, 1, 63
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; CHECK-NEXT: addi r3, r3, -1
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; CHECK-NEXT: stb r3, glob@toc@l(r5)
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, %b
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%conv3 = sext i1 %cmp to i8
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store i8 %conv3, i8* @glob
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ret void
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; CHECK-TBD-LABEL: @test_igeuc_sext_store
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; CHECK-TBD: subf [[REG1:r[0-9]+]], r3, r4
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; CHECK-TBD: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63
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; CHECK-TBD: addi [[REG3:r[0-9]+]], [[REG2]], -1
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; CHECK-TBD: stb [[REG3]]
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; CHECK-TBD: blr
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}
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; Function Attrs : norecurse nounwind
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define dso_local void @test_igeuc_z_store(i8 zeroext %a) {
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; CHECK-LABEL: test_igeuc_z_store:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis r3, r2, glob@toc@ha
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; CHECK-NEXT: li r4, 1
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; CHECK-NEXT: stb r4, glob@toc@l(r3)
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, 0
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%conv3 = zext i1 %cmp to i8
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store i8 %conv3, i8* @glob
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ret void
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}
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; Function Attrs: norecurse nounwind
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define dso_local void @test_igeuc_sext_z_store(i8 zeroext %a) {
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; CHECK-LABEL: test_igeuc_sext_z_store:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis r3, r2, glob@toc@ha
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; CHECK-NEXT: li r4, -1
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; CHECK-NEXT: stb r4, glob@toc@l(r3)
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; CHECK-NEXT: blr
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entry:
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%cmp = icmp uge i8 %a, 0
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%conv3 = sext i1 %cmp to i8
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store i8 %conv3, i8* @glob
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ret void
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}
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