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e73d807a5c
Summary: Previously, the presence of KILL instructions would block valid candidates from filling a specific delay slot. With the elimination of the KILL instructions, in the appropriate range, we are able to fill more slots and keep the information from future def/use analysis consistent. Reviewers: dsanders Reviewed By: dsanders Subscribers: hfinkel, llvm-commits Differential Revision: http://reviews.llvm.org/D7724 llvm-svn: 235183
15 lines
493 B
LLVM
15 lines
493 B
LLVM
; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s
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; Currently, the following IR assembly generates a KILL instruction between
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; the bitwise-and instruction and the return instruction. We verify that the
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; delay slot filler ignores such KILL instructions by filling the slot of the
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; return instruction properly.
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define signext i32 @f1(i32 signext %a, i32 signext %b) {
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entry:
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; CHECK: jr $ra
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; CHECK-NEXT: and $2, $4, $5
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%r = and i32 %a, %b
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ret i32 %r
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}
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