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llvm-mirror/test/CodeGen/SystemZ/vec-max-05.ll
Ulrich Weigand bc658bf60a [SystemZ] Add support for IBM z14 processor (3/3)
This adds support for the new 128-bit vector float instructions of z14.
Note that these instructions actually only operate on the f128 type,
since only each 128-bit vector register can hold only one 128-bit
float value.  However, this is still preferable to the legacy 128-bit
float instructions, since those operate on pairs of floating-point
registers (so we can hold at most 8 values in registers), while the
new instructions use single vector registers (so we hold up to 32
value in registers).

Adding support includes:
- Enabling the instructions for the assembler/disassembler.
- CodeGen for the instructions.  This includes allocating the f128
  type now to the VR128BitRegClass instead of FP128BitRegClass.
- Scheduler description support for the instructions.

Note that for a small number of operations, we have no new vector
instructions (like integer <-> 128-bit float conversions), and so
we use the legacy instruction and then reformat the operand
(i.e. copy between a pair of floating-point registers and a
vector register).

llvm-svn: 308196
2017-07-17 17:44:20 +00:00

176 lines
5.3 KiB
LLVM

; Test vector maximum on z14.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare double @fmax(double, double)
declare double @llvm.maxnum.f64(double, double)
declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)
declare float @fmaxf(float, float)
declare float @llvm.maxnum.f32(float, float)
declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
declare fp128 @fmaxl(fp128, fp128)
declare fp128 @llvm.maxnum.f128(fp128, fp128)
; Test the fmax library function.
define double @f1(double %dummy, double %val1, double %val2) {
; CHECK-LABEL: f1:
; CHECK: wfmaxdb %f0, %f2, %f4, 4
; CHECK: br %r14
%ret = call double @fmax(double %val1, double %val2) readnone
ret double %ret
}
; Test the f64 maxnum intrinsic.
define double @f2(double %dummy, double %val1, double %val2) {
; CHECK-LABEL: f2:
; CHECK: wfmaxdb %f0, %f2, %f4, 4
; CHECK: br %r14
%ret = call double @llvm.maxnum.f64(double %val1, double %val2)
ret double %ret
}
; Test a f64 constant compare/select resulting in maxnum.
define double @f3(double %dummy, double %val) {
; CHECK-LABEL: f3:
; CHECK: lzdr [[REG:%f[0-9]+]]
; CHECK: wfmaxdb %f0, %f2, [[REG]], 4
; CHECK: br %r14
%cmp = fcmp ogt double %val, 0.0
%ret = select i1 %cmp, double %val, double 0.0
ret double %ret
}
; Test a f64 constant compare/select resulting in maxnan.
define double @f4(double %dummy, double %val) {
; CHECK-LABEL: f4:
; CHECK: lzdr [[REG:%f[0-9]+]]
; CHECK: wfmaxdb %f0, %f2, [[REG]], 1
; CHECK: br %r14
%cmp = fcmp ugt double %val, 0.0
%ret = select i1 %cmp, double %val, double 0.0
ret double %ret
}
; Test the v2f64 maxnum intrinsic.
define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2) {
; CHECK-LABEL: f5:
; CHECK: vfmaxdb %v24, %v26, %v28, 4
; CHECK: br %r14
%ret = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %val1, <2 x double> %val2)
ret <2 x double> %ret
}
; Test the fmaxf library function.
define float @f11(float %dummy, float %val1, float %val2) {
; CHECK-LABEL: f11:
; CHECK: wfmaxsb %f0, %f2, %f4, 4
; CHECK: br %r14
%ret = call float @fmaxf(float %val1, float %val2) readnone
ret float %ret
}
; Test the f32 maxnum intrinsic.
define float @f12(float %dummy, float %val1, float %val2) {
; CHECK-LABEL: f12:
; CHECK: wfmaxsb %f0, %f2, %f4, 4
; CHECK: br %r14
%ret = call float @llvm.maxnum.f32(float %val1, float %val2)
ret float %ret
}
; Test a f32 constant compare/select resulting in maxnum.
define float @f13(float %dummy, float %val) {
; CHECK-LABEL: f13:
; CHECK: lzer [[REG:%f[0-9]+]]
; CHECK: wfmaxsb %f0, %f2, [[REG]], 4
; CHECK: br %r14
%cmp = fcmp ogt float %val, 0.0
%ret = select i1 %cmp, float %val, float 0.0
ret float %ret
}
; Test a f32 constant compare/select resulting in maxnan.
define float @f14(float %dummy, float %val) {
; CHECK-LABEL: f14:
; CHECK: lzer [[REG:%f[0-9]+]]
; CHECK: wfmaxsb %f0, %f2, [[REG]], 1
; CHECK: br %r14
%cmp = fcmp ugt float %val, 0.0
%ret = select i1 %cmp, float %val, float 0.0
ret float %ret
}
; Test the v4f32 maxnum intrinsic.
define <4 x float> @f15(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2) {
; CHECK-LABEL: f15:
; CHECK: vfmaxsb %v24, %v26, %v28, 4
; CHECK: br %r14
%ret = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %val1, <4 x float> %val2)
ret <4 x float> %ret
}
; Test the fmaxl library function.
define void @f21(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) {
; CHECK-LABEL: f21:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
; CHECK: wfmaxxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]], 4
; CHECK: vst [[RES]], 0(%r4)
; CHECK: br %r14
%val1 = load fp128, fp128* %ptr1
%val2 = load fp128, fp128* %ptr2
%res = call fp128 @fmaxl(fp128 %val1, fp128 %val2) readnone
store fp128 %res, fp128* %dst
ret void
}
; Test the f128 maxnum intrinsic.
define void @f22(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) {
; CHECK-LABEL: f22:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
; CHECK: wfmaxxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]], 4
; CHECK: vst [[RES]], 0(%r4)
; CHECK: br %r14
%val1 = load fp128, fp128* %ptr1
%val2 = load fp128, fp128* %ptr2
%res = call fp128 @llvm.maxnum.f128(fp128 %val1, fp128 %val2)
store fp128 %res, fp128* %dst
ret void
}
; Test a f128 constant compare/select resulting in maxnum.
define void @f23(fp128 *%ptr, fp128 *%dst) {
; CHECK-LABEL: f23:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vzero [[REG2:%v[0-9]+]]
; CHECK: wfmaxxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]], 4
; CHECK: vst [[RES]], 0(%r3)
; CHECK: br %r14
%val = load fp128, fp128* %ptr
%cmp = fcmp ogt fp128 %val, 0xL00000000000000000000000000000000
%res = select i1 %cmp, fp128 %val, fp128 0xL00000000000000000000000000000000
store fp128 %res, fp128* %dst
ret void
}
; Test a f128 constant compare/select resulting in maxnan.
define void @f24(fp128 *%ptr, fp128 *%dst) {
; CHECK-LABEL: f24:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vzero [[REG2:%v[0-9]+]]
; CHECK: wfmaxxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]], 1
; CHECK: vst [[RES]], 0(%r3)
; CHECK: br %r14
%val = load fp128, fp128* %ptr
%cmp = fcmp ugt fp128 %val, 0xL00000000000000000000000000000000
%res = select i1 %cmp, fp128 %val, fp128 0xL00000000000000000000000000000000
store fp128 %res, fp128* %dst
ret void
}