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llvm-mirror/test/CodeGen/X86/pr46004.ll
Simon Pilgrim 104d358d14 [CGP] Ensure address scaled offset is representable as int64_t
AddressingModeMatcher::matchScaledValue was calling getSExtValue for a constant before ensuring that we can actually represent the value as int64_t

Fixes OSSFuzz#22723 which is a followup to rGc479052a74b2 (PR46004 / OSSFuzz#22357)
2020-05-29 12:25:43 +01:00

37 lines
1.1 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
; OSS Fuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=22357
define void @fuzz22357(i128 %a0) {
; X86-LABEL: fuzz22357:
; X86: # %bb.0:
; X86-NEXT: movb $0, (%eax)
; X86-NEXT: retl
;
; X64-LABEL: fuzz22357:
; X64: # %bb.0:
; X64-NEXT: movb $0, (%rax)
; X64-NEXT: retq
%1 = add i128 %a0, 170141183460469231731687303715884105727
%2 = add nuw nsw i128 %1, 22222
%3 = getelementptr i8, i8* undef, i128 %2
store i8 0, i8* %3, align 1
ret void
}
; OSS Fuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=22723
define void @fuzz22723(i128 %a0) {
; X86-LABEL: fuzz22723:
; X86: # %bb.0:
; X86-NEXT: retl
;
; X64-LABEL: fuzz22723:
; X64: # %bb.0:
; X64-NEXT: retq
%1 = add i128 %a0, 170141183460469231731687303715884105727
%2 = getelementptr i128*, i128** undef, i128 %1
store i128* undef, i128** %2, align 8
ret void
}