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https://github.com/RPCS3/llvm-mirror.git
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154 lines
5.5 KiB
LLVM
154 lines
5.5 KiB
LLVM
; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s --check-prefix=V6
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi | FileCheck %s --check-prefix=V6M
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; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s | FileCheck %s --check-prefix=ARM1156T2F-S
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
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; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+fp-armv8 | FileCheck %s --check-prefix=V8-FPARMv8
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+neon | FileCheck %s --check-prefix=V8-NEON
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+fp-armv8 -mattr=+neon | FileCheck %s --check-prefix=V8-FPARMv8-NEON
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+fp-armv8,+neon,+crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,-vfp2 | FileCheck %s --check-prefix=NOFP
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; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 | FileCheck %s --check-prefix=CORTEX-A9
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; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
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; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=CORTEX-M4
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
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; This tests that MC/asm header conversion is smooth and that build attributes are correct
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;
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; V6: .eabi_attribute 6, 6
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; V6: .eabi_attribute 8, 1
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; V6: .eabi_attribute 24, 1
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; V6: .eabi_attribute 25, 1
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; V6M: .eabi_attribute 6, 12
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; V6M: .eabi_attribute 7, 77
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; V6M: .eabi_attribute 8, 0
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; V6M: .eabi_attribute 9, 1
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; V6M: .eabi_attribute 24, 1
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; V6M: .eabi_attribute 25, 1
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; ARM1156T2F-S: .cpu arm1156t2f-s
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; ARM1156T2F-S: .eabi_attribute 6, 8
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; ARM1156T2F-S: .eabi_attribute 8, 1
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; ARM1156T2F-S: .eabi_attribute 9, 2
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; ARM1156T2F-S: .eabi_attribute 10, 2
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; ARM1156T2F-S: .fpu vfpv2
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; ARM1156T2F-S: .eabi_attribute 20, 1
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; ARM1156T2F-S: .eabi_attribute 21, 1
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; ARM1156T2F-S: .eabi_attribute 23, 3
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; ARM1156T2F-S: .eabi_attribute 24, 1
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; ARM1156T2F-S: .eabi_attribute 25, 1
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; V7M: .eabi_attribute 6, 10
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; V7M: .eabi_attribute 7, 77
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; V7M: .eabi_attribute 8, 0
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; V7M: .eabi_attribute 9, 2
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; V7M: .eabi_attribute 24, 1
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; V7M: .eabi_attribute 25, 1
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; V7M: .eabi_attribute 44, 0
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; V7: .syntax unified
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; V7: .eabi_attribute 6, 10
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; V7: .eabi_attribute 20, 1
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; V7: .eabi_attribute 21, 1
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; V7: .eabi_attribute 23, 3
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; V7: .eabi_attribute 24, 1
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; V7: .eabi_attribute 25, 1
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; V8: .syntax unified
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; V8: .eabi_attribute 6, 14
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; Vt8: .syntax unified
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; Vt8: .eabi_attribute 6, 14
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; V8-FPARMv8: .syntax unified
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; V8-FPARMv8: .eabi_attribute 6, 14
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; V8-FPARMv8: .eabi_attribute 10, 7
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; V8-FPARMv8: .fpu fp-armv8
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; V8-NEON: .syntax unified
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; V8-NEON: .eabi_attribute 6, 14
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; V8-NEON: .fpu neon
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; V8-NEON: .eabi_attribute 12, 3
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; V8-FPARMv8-NEON: .syntax unified
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; V8-FPARMv8-NEON: .eabi_attribute 6, 14
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; V8-FPARMv8-NEON: .fpu neon-fp-armv8
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; V8-FPARMv8-NEON: .eabi_attribute 10, 7
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; V8-FPARMv8-NEON: .eabi_attribute 12, 3
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; V8-FPARMv8-NEON-CRYPTO: .syntax unified
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; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
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; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
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; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 10, 7
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; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
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; NOFP-NOT: .eabi_attribute 20
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; NOFP-NOT: .eabi_attribute 21
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; NOFP-NOT: .eabi_attribute 23
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; CORTEX-A9: .cpu cortex-a9
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; CORTEX-A9: .eabi_attribute 6, 10
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; CORTEX-A9: .eabi_attribute 7, 65
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; CORTEX-A9: .eabi_attribute 8, 1
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; CORTEX-A9: .eabi_attribute 9, 2
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; CORTEX-A9: .fpu neon
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; CORTEX-A9: .eabi_attribute 10, 3
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; CORTEX-A9: .eabi_attribute 12, 1
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; CORTEX-A9: .eabi_attribute 20, 1
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; CORTEX-A9: .eabi_attribute 21, 1
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; CORTEX-A9: .eabi_attribute 23, 3
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; CORTEX-A9: .eabi_attribute 24, 1
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; CORTEX-A9: .eabi_attribute 25, 1
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; CORTEX-M0: .cpu cortex-m0
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; CORTEX-M0: .eabi_attribute 6, 12
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; CORTEX-M0: .eabi_attribute 7, 77
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; CORTEX-M0: .eabi_attribute 8, 0
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; CORTEX-M0: .eabi_attribute 9, 1
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; CORTEX-M0: .eabi_attribute 24, 1
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; CORTEX-M0: .eabi_attribute 25, 1
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; CORTEX-M4: .cpu cortex-m4
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; CORTEX-M4: .eabi_attribute 6, 13
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; CORTEX-M4: .eabi_attribute 7, 77
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; CORTEX-M4: .eabi_attribute 8, 0
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; CORTEX-M4: .eabi_attribute 9, 2
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; CORTEX-M4: .eabi_attribute 10, 6
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; CORTEX-M4: .fpu vfpv4
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; CORTEX-M4: .eabi_attribute 20, 1
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; CORTEX-M4: .eabi_attribute 21, 1
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; CORTEX-M4: .eabi_attribute 23, 3
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; CORTEX-M4: .eabi_attribute 24, 1
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; CORTEX-M4: .eabi_attribute 25, 1
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; CORTEX-M4: .eabi_attribute 44, 0
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; CORTEX-R5: .cpu cortex-r5
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; CORTEX-R5: .eabi_attribute 6, 10
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; CORTEX-R5: .eabi_attribute 7, 82
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; CORTEX-R5: .eabi_attribute 8, 1
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; CORTEX-R5: .eabi_attribute 9, 2
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; CORTEX-R5: .eabi_attribute 10, 4
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; CORTEX-R5: .fpu vfpv3
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; CORTEX-R5: .eabi_attribute 20, 1
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; CORTEX-R5: .eabi_attribute 21, 1
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; CORTEX-R5: .eabi_attribute 23, 3
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; CORTEX-R5: .eabi_attribute 24, 1
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; CORTEX-R5: .eabi_attribute 25, 1
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; CORTEX-R5: .eabi_attribute 44, 2
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; CORTEX-A53: .cpu cortex-a53
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; CORTEX-A53: .eabi_attribute 6, 14
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; CORTEX-A53: .eabi_attribute 7, 65
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; CORTEX-A53: .eabi_attribute 8, 1
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; CORTEX-A53: .eabi_attribute 9, 2
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; CORTEX-A53: .eabi_attribute 24, 1
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; CORTEX-A53: .eabi_attribute 25, 1
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define i32 @f(i64 %z) {
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ret i32 0
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}
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