Clement Courbet 6b77481d59 [llvm-exegesis] Fix support for LEA64_32r. ... Summary: Add unit test to show the issue: We must select an *aliasing* output register, not the exact register. Reviewers: gchatelet Subscribers: tschuett, mstojanovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73095		2020-01-21 13:58:23 +01:00
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analysis-cluster-stabilization-config.test
analysis-cluster-stabilization.test
analysis-clustering-algorithms.test
analysis-epsilons.test
analysis-inconsistencies-uops-backwards.test
analysis-inconsistencies-uops.test
analysis-naive-cluster-stabilization.test
analysis-naive-clusterization.test
analysis-noise.test
analysis-same-cluster-for-ops-in-different-sched-clusters.test
analysis-uops-backwards.test
analysis-uops-variant.test
analysis-uops.test
inverse_throughput-by-opcode-name.s
latency-by-opcode-name.s
latency-CMOV32rr.s
latency-LEA64_32r.s	[llvm-exegesis] Fix support for LEA64_32r.	2020-01-21 13:58:23 +01:00
latency-LEA64r.s
latency-SBB8rr.s
latency-SQRTSSr.s	[llvm-exegesis] Fix 44b9942898c7.	2019-12-02 16:13:27 +01:00
lit.local.cfg
max-configs.test
uops-ADD32mi8.s
uops-ADD32mr.s
uops-ADD32rm.s
uops-ADD_F32m.s
uops-BEXTR32rm.s
uops-BSF16rm.s
uops-BTR64mr.s
uops-by-opcode-name.s
uops-CMOV16rm-noreg.s
uops-LEA64r.s
uops-VFMADDSS4rm.s	[X86] Model MXCSR for AVX instructions other than AVX512	2019-12-03 08:53:47 +08:00
uops-XCHG64rr.s