1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00
llvm-mirror/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll
Pablo Barrio 025fa2bbb5 [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below
Summary:
The Pointer Authentication Extension (PAC) was added in Armv8.3-A. Some
instructions are implemented in the HINT space to allow compiling code
common to CPUs regardless of whether they feature PAC or not, and still
benefit from PAC protection in the PAC-enabled CPUs.

The 8.3-specific mnemonics were currently enabled in any architecture, and
LLVM was emitting them in assembly files when PAC code generation was
enabled. This was ok for compilations where both LLVM codegen and the
integrated assembler were used. However, the LLVM codegen was not
compatible with other assemblers (e.g. GAS). Given the fact that the
approach from these assemblers (i.e. to disallow Armv8.3-A mnemonics if
compiling for Armv8.2-A or lower) is entirely reasonable, this patch makes
LLVM to emit HINT when building for Armv8.2-A and below, instead of
PACIASP, AUTIASP and friends. Then, LLVM assembly should be compatible
with other assemblers.

Reviewers: samparker, chill, LukeCheeseman

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71658
2020-01-13 14:14:48 +00:00

82 lines
2.6 KiB
LLVM

; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
; CHECK-LABEL: a: // @a
; CHECK-NEXT: // %bb.0:
; V8A: hint #27
; V83A: pacibsp
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca i32, align 4
store i32 1, i32* %1, align 4
store i32 2, i32* %2, align 4
store i32 3, i32* %3, align 4
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; V8A: hint #31
; V83A: autibsp
ret void
}
define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
; CHECK-LABEL: b: // @b
; CHECK-NEXT: // %bb.0:
; V8A: hint #27
; V83A: pacibsp
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca i32, align 4
store i32 1, i32* %1, align 4
store i32 2, i32* %2, align 4
store i32 3, i32* %3, align 4
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; V8A: hint #31
; V83A: autibsp
ret void
}
define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
; CHECK-LABEL: c: // @c
; CHECK-NEXT: // %bb.0:
; V8A: hint #27
; V83A: pacibsp
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca i32, align 4
store i32 1, i32* %1, align 4
store i32 2, i32* %2, align 4
store i32 3, i32* %3, align 4
store i32 4, i32* %4, align 4
store i32 5, i32* %5, align 4
store i32 6, i32* %6, align 4
; V8A: hint #31
; V83A: autibsp
ret void
}
; CHECK-LABEL: OUTLINED_FUNCTION_0:
; CHECK: // %bb.0:
; CHECK-NEXT: .cfi_b_key_frame
; V8A-NEXT: hint #27
; V83A-NEXT: pacibsp
; CHECK-NEXT: .cfi_negate_ra_state
; V8A: hint #31
; V83A: autibsp
; CHECK-NEXT: ret